IEC 63504-2804:2023

Software-Hardware Interface for Multi-Many-Core

IEC 63504-2804:2023 defines an architecture description standard from the software design perspective - this provides a common interface that abstracts the hardware properties that are critical to enable multicore tools. The standard includes performance estimation accuracy for complex processors like Very Long Instruction Word (VLIW) core and complex contention scenarios, description of caches to include uncached memory regions and caches for subsets of memories, properties for coarse power consumption estimation, and reusability by separating eXtensible Markup Language (XML) files for processor description and other memory/communication-related information. This is an IEC/IEEE dual logo standard.

General Information

• Status: Published
• Publication Date: 16-Oct-2023
• ICS: 25.040.01 - Industrial automation systems in general
• ICS: 35.060 - Languages used in information technology
• Technical Committee: TC 91 - Electronics assembly technology
• Drafting Committee: WG 13 - TC 91/WG 13
• Current Stage: PPUB - Publication issued
• Start Date: 08-Sep-2023
• Completion Date: 17-Oct-2023

Standards Content (Sample)

IEC 63504-2804 ®
Edition 1.0 2023-10
™
IEEE Std 2804
INTERNATIONAL
STANDARD
colour
inside
Software-Hardware Interface for Multi-Many-Core
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IEC 63504-2804 ®
Edition 1.0 2023-10
IEEE Std 2804™
INTERNATIONAL
STANDARD
colour
inside
Software-Hardware Interface for Multi-Many-Core
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 25.040.01, 35.060 ISBN 978-2-8322-7514-6
IEEE Std 2804™-2019 – i –
Contents
1. Overview . 10
1.1 Scope . 10
1.2 Purpose . 10
1.3 Word usage . 10
1.4 General introduction . 11
2. Normative references . 18
3. Definitions . 18
4. SHIM concepts . 18
4.1 Topology—ComponentSet . 18
4.2 Inter-core communicationCommunicationSet . 19
4.3 Frequency and voltageFrequencyVoltageSet . 20
4.4 Communication network utilization and contentionContentionGroupSet . 21
4.5 Performance . 22
4.6 Power—PowerConfiguration . 26
4.7 Vendor extensions . 26
4.8 Configuration . 27
5. Roadmap . 29
5.1 General . 29
5.2 Further componentization of SHIM XML . 30
5.3 Hardware-related software properties . 30
5.4 Schema refinement for smaller XML . 30
6. SHIM interface . 31
6.1 shim20.xsd . 31
6.2 Conventions . 40
6.3 Enumeration . 40
6.4 Shim . 42
6.5 SystemConfiguration . 42
6.6 ComponentSet . 43
6.7 FrequencyVoltageSet . 53
6.8 AddressSpaceSet . 56
6.9 CommunicationSet . 59
6.10 ContentionGroupSet . 63
6.11 PowerConfiguration . 65
6.12 VendorExtension . 66
7. Use cases . 68
7.1 Performance estimation: Auto-parallelizing compiler . 68
7.2 Tool configurationRTOS configuration tool . 70
7.3 Hardware modeling . 71
8. SHIM XML authoring rules and guidelines . 71
8.1 File name [rule] . 72
8.2 The naming of various objects [rule] . 73
8.3 Level of detail and precision [guideline] . 73
9. Common Configuration File (CCF) . 73
This is a copyrighted IEEE Standard. For personal or standards development use only.
Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.

– ii – IEEE Std 2804™-2019
9.1 Concept . 73
9.2 Interface . 75
9.3 Examples . 79
10. FAQ . 80
Annex A Participants . 83
This is a copyrighted IEEE Standard. For personal or standards development use only.
Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.

IEEE Std 2804™-2019 – iii –
SOFTWARE-HARDWARE INTERFACE FOR MULTI-MANY-CORE
FOREWORD
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