IEC TS 62607-12-3:2026

Nanomanufacturing - Key control characteristics - Part 12-3: 2D material-related products - Schottky barrier heights of 2D material-based field-effect transistors: temperature-dependent current–voltage measurements

IEC TS 62607-12-3:2026, which is a Technical Specification, establishes a standardized method to determine the key control characteristic
• Schottky barrier height (SBH)
from the temperature-dependent current–voltage characterization results obtained from two-dimensional (2D) material-based electronic devices.
This document
• defines the Schottky barrier formed from the interface between a 2D material and a metal;
• specifies a 2D device sample for the measurement of the Schottky barrier;
• specifies the measurement procedure for the Schottky barrier formed at the interface within 2D devices;
• provides proper mathematical formulas used to extract the Schottky barrier formed from 2D-materials-based devices;
• provides relevant case studies; and
• provides relevant references

General Information

• Status: Published
• Publication Date: 08-Jun-2026
• ICS: 07.120 - Nanotechnologies
• Technical Committee: TC 113 - Nanotechnology for electrotechnical products and systems
• Drafting Committee: WG 8 - TC 113/WG 8
• Current Stage: PPUB - Publication issued
• Start Date: 09-Jun-2026
• Completion Date: 03-Jul-2026

Standards Content (Sample)

IEC TS 62607-12-3 ®
Edition 1.0 2026-06
TECHNICAL
SPECIFICATION
Nanomanufacturing - Key control characteristics -
Part 12-3: 2D material-related products - Schottky barrier heights of 2D material-
based field-effect transistors: temperature-dependent current-voltage
measurements
ICS 07.120  ISBN 978-2-8327-1283-2

All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or
by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either
IEC or IEC's member National Committee in the country of the requester. If you have any questions about IEC copyright
or have an enquiry about obtaining additional rights to this publication, please contact the address below or your local
IEC member National Committee for further information.

IEC Secretariat Tel.: [phone]
3, rue de Varembé [e-mail]
CH-1211 Geneva 20 www.iec.ch
Switzerland
About the IEC
The International Electrotechnical Commission (IEC) is the leading global organization that prepares and publishes
International Standards for all electrical, electronic and related technologies.

About IEC publications
The technical content of IEC publications is kept under constant review by the IEC. Please make sure that you have the
latest edition, a corrigendum or an amendment might have been published.

IEC publications search - IEC Products & Services Portal - products.iec.ch
webstore.iec.ch/advsearchform Discover our powerful search engine and read freely all the
The advanced search enables to find IEC publications by a publications previews, graphical symbols and the glossary.
variety of criteria (reference number, text, technical With a subscription you will always have access to up to date
committee, …). It also gives information on projects, content tailored to your needs.
replaced and withdrawn publications.
Electropedia - www.electropedia.org
The world's leading online dictionary on electrotechnology,
IEC Just Published - webstore.iec.ch/justpublished
Stay up to date on all new IEC publications. Just Published containing more than 22 500 terminological entries in English
details all new publications released. Available online and and French, with equivalent terms in 25 additional languages.
once a month by email. Also known as the International Electrotechnical Vocabulary
(IEV) online.
IEC Customer Service Centre - webstore.iec.ch/csc
If you wish to give us your feedback on this publication or
need further assistance, please contact the Customer
Service Centre: [e-mail].
CONTENTS
FOREWORD . 2
INTRODUCTION . 4
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
3.1 General terms regarding the sample . 7
3.2 General terms regarding the sample test. 8
4 Sample preparation . 9
4.1 Device structure of the sample under test . 9
4.2 Sample preparation method . 9
4.2.1 Sample preparation . 9
4.2.2 Fabrication of FET . 10
4.3 Measurement equipment . 10
5 Measurement procedure . 12
6 Data analysis and interpretation of results . 12
Annex A (informative) Mathematical extraction of SBH. 15
Bibliography . 18

Figure 1 – Energy band diagram of a metal–semiconductor junction . 4
Figure 2 – Extraction of SBH from a temperature-dependent transfer curve [1] . 6
Figure 3 – Schematic of a FET . 9
Figure 4 – Experimental setup used for SBH measurements . 11
Figure 5 – Transfer curves obtained from MoS FET by varying temperature . 12
Figure 6 – Arrhenius plot obtained from I–V transfer curves . 13
Figure 7 – SBHs obtained at different gate voltages (V ) . 14
G
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Nanomanufacturing - Key control characteristics -
Part 12-3: 2D material-related products - Schottky barrier heights of 2D
material-based field-effect transistors: temperature-dependent
current–voltage measurements
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as "IEC Publication(s)"). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
may be required to implement this document. However, implementers are cautioned that this may not represent
the latest information, which may be obtained from the patent database available at https://patents.iec.ch. IEC
shall not be held responsible for identifying any or all such patent rights.
IEC TS 62607-12-3 has been prepared by IEC technical committee 113: Nanotechnology for
electrotechnical products and systems. It is a Technical Specification.
The text of this Technical Specification is based on the following documents:
Draft Report on voting
113/967/DTS 113/976/RVDTS
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this Technical Specification is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 62607 series, published under the general title Nanomanufacturing -
Key control characteristics, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
INTRODUCTION
Atomically thin two-dimensional (2D) materials are expected to be used for future electrical sub-
systems or electronic device applications.
The Schottky barrier refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor or other material. See Figure 1.

a) Electron energy before contact b) Electron energy after contact

Key
Φ work function of a metal
M
Φ work function of a semiconductor
S
Schottky barrier height formed at the metal-semiconductor junction
Φ
B
W depletion width in a semiconductor
built-in potential induced in the depletion region of a semiconductor
Φ
bi
E energy level of vacuum
VAC
E and E Fermi energy levels of a metal and a semiconductor, respectively
FM FS
E and E energy levels of conduction band minimum and valence band maximum, respectively
C V
χ electron affinity of a semiconductor
S
Figure 1 – Energy band diagram of a metal–semiconductor junction
In electronic devices, this barrier can influence the flow of current across the interface, as it can
prevent or allow the movement of electrons depending on the direction of the voltage applied.
The Schottky barrier height (SBH) is expressed in unit of Joule (J) or electron volt (eV); however,
electron volt is more widely used in the electronic device community.
Specifically, when a metal is placed in contact with a semiconductor, the difference in work
function between the two materials can lead to the formation of depletion of free carriers near
the interface. The depletion region as shown in Figure 1 is dependent on SBH and doping
concentration, and it affects the flow of electrons.
The magnitude of the SBH depends on a number of factors, including the choice of materials,
the doping concentration of the semiconductor, and the voltages applied to the device. In some
cases, the Schottky barrier can be deliberately engineered to control the flow of current in
electronic devices, such as in Schottky diodes, which are commonly used in a range of
electronic applications, including power supplies, radio frequency (RF) circuits, and digital logic
circuits. Examples of Schottky devices include Schottky diodes, Schottky transistors, and
Schottky barrier photodiodes.
As for conventional semiconductor devices, several methods have been used to determine SBH,
e.g. temperature-dependent current–voltage (I–V) measurement, capacitance–voltage (C–V)
measurement, and photocurrent measurement. [1]
However, it is difficult to measure SBH of 2D materials by using C–V methods because their
ultra-thinness and van der Waals (vdW) gap formed at the metal–2D semiconductor interfaces
give rise to unreliable results arising from various parasitic capacitance components. It is also
difficult to measure SBH of 2D materials by using photocurrent which is dependent on internal
photo-emission because their ultra-thinness gives rise to weak optoelectronic intensity and vdW
gap formed at the metal-semiconductor interfaces gives rise to noisy photocurrent signal.
Therefore, the current–voltage (I–V) measurement as the fundamental electrical
characterization technique has been predominantly utilized to measure SBH in 2D materials-
based electronic devices. Especially, I–V transfer curves obtained from 2D material-based field-
effect transistors (FETs) at various temperatures have been used to extract SBH, as shown in
Figure 2. That is, SBH can be determined by measuring only current arising from thermionic
emission at elevated temperatures at the flat-band condition without current arising from field
emission which is commonly described as tunnelling.
___________
Numbers in square brackets refer to the Bibliography.
a) Cross-sectional schematic of 2D FET

b) Different transport regimes at the source contact as a function of gate voltage (V )
G
1,5
e) Schottky barrier as a
c) Temperature-dependent I–V d) Arrhenius plot (ln 1/T versus
function of V
transfer curves 1 000/T) of c)
G
Key
V gate voltage
G
V drain voltage
D
E energy level of vacuum
VAC
E and E energy levels of conduction band minimum and valence band maximum, respectively
C V
NOTE Thermionic emission dominates in the OFF state (V < V ), and tunnelling current begins to dominate in the
G FB
ON state. Here, qΦ is equivalent to the n-type SBH (qΦ ) at flat-band condition.
B0 Bn
Figure 2 – Extraction of SBH from a temperature-dependent transfer curve [1]

1 Scope
This part of IEC 62607 establishes a standardized method to determine the key control
characteristic
– Schottky barrier height (SBH)
from the temperature-dependent current–voltage characterization results obtained from two-
dimensional (2D) material-based electronic devices.
This document
– defines the Schottky barrier formed from the interface between a 2D material and a metal;
– specifies a 2D device sample for the measurement of the Schottky barrier;
– specifies the measurement procedure for the Schottky barrier formed at the interface within
2D devices;
– provides proper mathematical formulas used to extract the Schottky barrier formed from 2D-
materials-based devices;
– provides relevant case studies; and
– provides relevant references
2 Normative references
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1 General terms regarding the sample
3.1.1
Schottky barrier
junction between a metal and a semiconductor in which a transition region, formed at the
surface of the semiconductor, acts as a rectifying barrier
[SOURCE IEC 60050-521:2002 [2], 521-02-71]
3.1.2
Schottky barrier height
SBH
difference between the conduction band minimum of a semiconductor
and the Fermi energy level of a metal
Note 1 to entry: Schottky barrier height refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor.
3.1.3
Schottky barrier height
SBH
difference between the valence band maximum of a semiconductor
and the Fermi energy level of a metal
Note 1 to entry: Schottky barrier height refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor.
3.1.4
two-dimensional material
2D material
material, consisting of one or several layers with the atoms in each layer strongly bonded to
neighbouring atoms in the same layer, which
...