IEC TS 62607-12-3:2026

• Abstract:

  IEC TS 62607-12-3:2026, which is a Technical Specification, establishes a standardized method to determine the key control characteristic; • Schottky barrier height (SBH); from the temperature-dependent current–voltage characterization results obtained from two-dimensional (2D) material-based electronic devices.; This document; • defines the Schottky barrier formed from the interface between a 2D material and a metal;; • specifies a 2D device sample for the measurement of the Schottky barrier;; • specifies the measurement procedure for the Schottky barrier formed at the interface within 2D devices;; • provides proper mathematical formulas used to extract the Schottky barrier formed from 2D-materials-based devices;; • provides relevant case studies; and; • provides relevant references

• Status: Published
• Publication Date: 08-Jun-2026
• ICS: 07.120 - Nanotechnologies
• Technical Committee: TC 113 - Nanotechnology for electrotechnical products and systems
• Drafting Committee: WG 8 - TC 113/WG 8
• Current Stage: PPUB - Publication issued
• Start Date: 09-Jun-2026
• Completion Date: 03-Jul-2026

IEC TS 62607-12-3:2026 is an IEC Technical Specification for determining the Schottky barrier height (SBH) of 2D material-based field-effect transistors (FETs) from temperature-dependent current-voltage (I-V) measurements. It gives a standardized sample, measurement, and data-analysis method for engineers and researchers working with 2D material-based electronic devices and metal contacts.

What does IEC TS 62607-12-3:2026 specify?

IEC TS 62607-12-3:2026 specifies a standardized way to extract SBH from temperature-dependent transfer I-V data measured on 2D material-based electronic devices. The document focuses on the metal-2D material interface and on FET measurements that use temperature variation to separate thermionic emission from other current transport effects.

Part of the document	What it covers
Clause 1	Scope of the method and the target characteristic, SBH
Clause 2	Normative references
Clause 3	Terms and definitions for the sample and the test
Clause 4	Sample preparation, device structure, and measurement equipment
Clause 5	Measurement procedure
Clause 6	Data analysis and interpretation of results
Annex A	Informative mathematical extraction of SBH
Bibliography	Background references and worked examples

The scope is practical rather than broad. It covers how to prepare a 2D device sample, how to measure transfer curves at different temperatures, and how to calculate SBH from the results. It also points readers to case studies and background references that help when applying the method to real devices.

What are the key requirements of IEC TS 62607-12-3:2026?

Use the specified FET measurement approach

Clause 4 and Clause 5 base the method on a FET in which drain current is measured as a function of gate voltage at constant drain voltage, then repeated at different temperatures. In practice, this means the user needs a device structure that can produce comparable transfer curves across temperature so that the temperature dependence of current can be used for SBH extraction.

The document favors varying gate voltage while keeping drain voltage constant. That choice matters because it reduces the influence of drain-voltage-driven effects on the extracted SBH and makes the result more representative of the contact barrier.

Prepare the sample as a clean 2D device with specified materials

Clause 4 describes 2D material samples prepared by processes such as micromechanical exfoliation or chemical vapour deposition (CVD), typically on silica on silicon (SiO2 on Si). It also states that the 2D channel material and the contact metals shall be specified, because SBH depends on the semiconductor Fermi level and the metal work function.

This matters in practice because interface quality changes the measured barrier. The document stresses clean metal interfaces, low defect density, and recording of fabrication details such as deposition steps, since defects, vdW gaps, and processing contamination can shift the apparent SBH.

Use suitable measurement equipment and grounding

Clause 4.3 specifies a semiconductor parameter analyser, typically with a probe station, for electrical measurements. It also requires proper grounding of the equipment, the sample, and conductive objects or people near the setup to avoid electrostatic discharge.

For users, this means SBH measurements are not just a calculation problem. The instrument setup must protect the device and give stable transfer curves under temperature control, or the extracted barrier can be distorted by measurement artefacts.

Measure transfer curves over temperature

Clause 5 lays out the measurement sequence: contact the source, drain, and gate; establish the chamber conditions; sweep gate voltage to measure drain current; and repeat at different temperatures. The document recommends using as wide a temperature range as practical.

In practice, this is the heart of the method. SBH is extracted from how the transfer curve changes with temperature, so the temperature points need to be stable and repeatable enough to make the Arrhenius analysis meaningful.

Analyze the data with Arrhenius plots

Clause 6 explains that the transfer curves are converted into Arrhenius plots and then used to determine SBH from the slope. The document also notes that drain current may be normalized by channel width when width is known, which helps compare devices of different sizes.

This matters because current alone is not enough. The slope-based analysis separates temperature effects from device geometry, so a buyer or engineer can compare results from different FETs on a more consistent basis.

Interpret SBH together with contact resistance and device history

Clause 6 also warns that contact resistance and interface effects such as vdW gap, defects-induced gap states, metal-induced gap states, and contamination influence the measured conductance and therefore the apparent SBH. The document recommends referring to fabrication details before using the result.

That means SBH should be read as a device-dependent measurement, not an isolated number. Process history, contact formation, and interface quality all help explain why two devices with the same material pair can give different values.

Use Annex A for the mathematical basis

Annex A gives the mathematical derivation behind the extraction method and explains why 2D channels follow a different thermionic-emission form from 3D channels. It also shows the alternative extraction routes and notes the role of the ideality factor in non-ideal behavior.

For users, Annex A is the place to go when they need to understand why the method uses temperature-dependent transfer curves and why the 2D model is not the same as a bulk-semiconductor model.

What terms does IEC TS 62607-12-3:2026 define?

• Schottky barrier - A junction between a metal and a semiconductor where a transition region at the semiconductor surface acts as a rectifying barrier.
• Schottky barrier height (SBH) - For an n-type semiconductor, the energy difference between the conduction band minimum and the metal Fermi energy level.
• Schottky barrier height (SBH) - For a p-type semiconductor, the energy difference between the valence band maximum and the metal Fermi energy level.
• two-dimensional material (2D material) - A material made of one or several strongly bonded atomic layers with nanoscale thickness and larger lateral dimensions.
• field effect transistor (FET) - A transistor in which the gate voltage controls conduction between source and drain.
• transfer curve - A curve of drain current versus gate voltage at constant drain voltage, used to assess FET behavior.
• thermionic emission - Electron emission caused by heat that allows carriers to overcome the Schottky barrier.
• field emission - Electron emission caused by an electric field through the energy barrier at the metal-semiconductor interface.

Who uses IEC TS 62607-12-3:2026?

IEC TS 62607-12-3:2026 is used by engineers, researchers, and test laboratories that fabricate or evaluate 2D material-based FETs. It is relevant to teams working on contact engineering, interface characterization, and electrical testing of nanomaterial devices.

Quality managers and technical buyers can also use it when they need a common test method for comparing devices, suppliers, or process changes. The document is especially useful where SBH is a key control characteristic in 2D material-related products.

What does the IEC TS 62607-12-3:2026 document contain?

The document contains the scope, terminology, sample-preparation guidance, measurement procedure, and data-analysis method needed to determine SBH from temperature-dependent transfer I-V results. It includes figures showing the metal-semiconductor energy-band picture, the FET test structure, the experimental setup, transfer curves, and Arrhenius plots.

Annex A provides the mathematical derivation of the extraction method, including the thermionic-emission basis for 2D channels and the relation between temperature, current, and barrier height. The bibliography points to background texts and published case studies that illustrate how the method has been applied to 2D FETs in practice.

IEC TS 62607-12-3 ®
Edition 1.0 2026-06
TECHNICAL
SPECIFICATION
Nanomanufacturing - Key control characteristics -
Part 12-3: 2D material-related products - Schottky barrier heights of 2D material-
based field-effect transistors: temperature-dependent current-voltage
measurements
ICS 07.120  ISBN 978-2-8327-1283-2

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CONTENTS
FOREWORD . 2
INTRODUCTION . 4
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
3.1 General terms regarding the sample . 7
3.2 General terms regarding the sample test. 8
4 Sample preparation . 9
4.1 Device structure of the sample under test . 9
4.2 Sample preparation method . 9
4.2.1 Sample preparation . 9
4.2.2 Fabrication of FET . 10
4.3 Measurement equipment . 10
5 Measurement procedure . 12
6 Data analysis and interpretation of results . 12
Annex A (informative) Mathematical extraction of SBH. 15
Bibliography . 18

Figure 1 – Energy band diagram of a metal–semiconductor junction . 4
Figure 2 – Extraction of SBH from a temperature-dependent transfer curve [1] . 6
Figure 3 – Schematic of a FET . 9
Figure 4 – Experimental setup used for SBH measurements . 11
Figure 5 – Transfer curves obtained from MoS FET by varying temperature . 12
Figure 6 – Arrhenius plot obtained from I–V transfer curves . 13
Figure 7 – SBHs obtained at different gate voltages (V ) . 14
G
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
Nanomanufacturing - Key control characteristics -
Part 12-3: 2D material-related products - Schottky barrier heights of 2D
material-based field-effect transistors: temperature-dependent
current–voltage measurements
FOREWORD
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shall not be held responsible for identifying any or all such patent rights.
IEC TS 62607-12-3 has been prepared by IEC technical committee 113: Nanotechnology for
electrotechnical products and systems. It is a Technical Specification.
The text of this Technical Specification is based on the following documents:
Draft Report on voting
113/967/DTS 113/976/RVDTS
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this Technical Specification is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 62607 series, published under the general title Nanomanufacturing -
Key control characteristics, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
– reconfirmed,
– withdrawn, or
– revised.
INTRODUCTION
Atomically thin two-dimensional (2D) materials are expected to be used for future electrical sub-
systems or electronic device applications.
The Schottky barrier refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor or other material. See Figure 1.

a) Electron energy before contact b) Electron energy after contact

Key
Φ work function of a metal
M
Φ work function of a semiconductor
S
Schottky barrier height formed at the metal-semiconductor junction
Φ
B
W depletion width in a semiconductor
built-in potential induced in the depletion region of a semiconductor
Φ
bi
E energy level of vacuum
VAC
E and E Fermi energy levels of a metal and a semiconductor, respectively
FM FS
E and E energy levels of conduction band minimum and valence band maximum, respectively
C V
χ electron affinity of a semiconductor
S
Figure 1 – Energy band diagram of a metal–semiconductor junction
In electronic devices, this barrier can influence the flow of current across the interface, as it can
prevent or allow the movement of electrons depending on the direction of the voltage applied.
The Schottky barrier height (SBH) is expressed in unit of Joule (J) or electron volt (eV); however,
electron volt is more widely used in the electronic device community.
Specifically, when a metal is placed in contact with a semiconductor, the difference in work
function between the two materials can lead to the formation of depletion of free carriers near
the interface. The depletion region as shown in Figure 1 is dependent on SBH and doping
concentration, and it affects the flow of electrons.
The magnitude of the SBH depends on a number of factors, including the choice of materials,
the doping concentration of the semiconductor, and the voltages applied to the device. In some
cases, the Schottky barrier can be deliberately engineered to control the flow of current in
electronic devices, such as in Schottky diodes, which are commonly used in a range of
electronic applications, including power supplies, radio frequency (RF) circuits, and digital logic
circuits. Examples of Schottky devices include Schottky diodes, Schottky transistors, and
Schottky barrier photodiodes.
As for conventional semiconductor devices, several methods have been used to determine SBH,
e.g. temperature-dependent current–voltage (I–V) measurement, capacitance–voltage (C–V)
measurement, and photocurrent measurement. [1]
However, it is difficult to measure SBH of 2D materials by using C–V methods because their
ultra-thinness and van der Waals (vdW) gap formed at the metal–2D semiconductor interfaces
give rise to unreliable results arising from various parasitic capacitance components. It is also
difficult to measure SBH of 2D materials by using photocurrent which is dependent on internal
photo-emission because their ultra-thinness gives rise to weak optoelectronic intensity and vdW
gap formed at the metal-semiconductor interfaces gives rise to noisy photocurrent signal.
Therefore, the current–voltage (I–V) measurement as the fundamental electrical
characterization technique has been predominantly utilized to measure SBH in 2D materials-
based electronic devices. Especially, I–V transfer curves obtained from 2D material-based field-
effect transistors (FETs) at various temperatures have been used to extract SBH, as shown in
Figure 2. That is, SBH can be determined by measuring only current arising from thermionic
emission at elevated temperatures at the flat-band condition without current arising from field
emission which is commonly described as tunnelling.
___________
Numbers in square brackets refer to the Bibliography.
a) Cross-sectional schematic of 2D FET

b) Different transport regimes at the source contact as a function of gate voltage (V )
G
1,5
e) Schottky barrier as a
c) Temperature-dependent I–V d) Arrhenius plot (ln 1/T versus
function of V
transfer curves 1 000/T) of c)
G
Key
V gate voltage
G
V drain voltage
D
E energy level of vacuum
VAC
E and E energy levels of conduction band minimum and valence band maximum, respectively
C V
NOTE Thermionic emission dominates in the OFF state (V < V ), and tunnelling current begins to dominate in the
G FB
ON state. Here, qΦ is equivalent to the n-type SBH (qΦ ) at flat-band condition.
B0 Bn
Figure 2 – Extraction of SBH from a temperature-dependent transfer curve [1]

1 Scope
This part of IEC 62607 establishes a standardized method to determine the key control
characteristic
– Schottky barrier height (SBH)
from the temperature-dependent current–voltage characterization results obtained from two-
dimensional (2D) material-based electronic devices.
This document
– defines the Schottky barrier formed from the interface between a 2D material and a metal;
– specifies a 2D device sample for the measurement of the Schottky barrier;
– specifies the measurement procedure for the Schottky barrier formed at the interface within
2D devices;
– provides proper mathematical formulas used to extract the Schottky barrier formed from 2D-
materials-based devices;
– provides relevant case studies; and
– provides relevant references
2 Normative references
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminology databases for use in standardization at the following
addresses:
– IEC Electropedia: available at https://www.electropedia.org/
– ISO Online browsing platform: available at https://www.iso.org/obp
3.1 General terms regarding the sample
3.1.1
Schottky barrier
junction between a metal and a semiconductor in which a transition region, formed at the
surface of the semiconductor, acts as a rectifying barrier
[SOURCE IEC 60050-521:2002 [2], 521-02-71]
3.1.2
Schottky barrier height
SBH
difference between the conduction band minimum of a semiconductor
and the Fermi energy level of a metal
Note 1 to entry: Schottky barrier height refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor.
3.1.3
Schottky barrier height
SBH
difference between the valence band maximum of a semiconductor
and the Fermi energy level of a metal
Note 1 to entry: Schottky barrier height refers to a potential energy barrier that forms at the interface between a
metal and a semiconductor.
3.1.4
two-dimensional material
2D material
material, consisting of one or several layers with the atoms in each layer strongly bonded to
neighbouring atoms in the same layer, which
...