oSIST prEN IEC 62878-2-603:2023
(Main)Device embedding assembly technology - Part 2-603: Guideline for stacked electronic module - Test method of intra-module electrical connectivity
Device embedding assembly technology - Part 2-603: Guideline for stacked electronic module - Test method of intra-module electrical connectivity
Leitfaden für gestapelte elektronische Module - Prüfverfahren für die elektrische Verbindung innerhalb des Moduls
Techniques d’assemblage avec appareil(s) intégré(s) - Partie 2-603: Lignes directrices pour un empilement de modules électroniques - Méthode d’essai de la connectivité électrique entre modules
Tehnologija sestavov z vdelanimi elementi - 2-603. del: Smernice za zložene elektronske module - Preskusna metoda vmesnih modulov električne povezljivosti
General Information
Standards Content (Sample)
SLOVENSKI STANDARD
01-december-2023
Tehnologija sestavov z vdelanimi elementi - 2-603. del: Smernice za zložene
elektronske module - Preskusna metoda vmesnih modulov električne povezljivosti
Device embedding assembly technology - Part 2-603: Guideline for stacked electronic
module - Test method of intra-module electrical connectivity
Ta slovenski standard je istoveten z: prEN IEC 62878-2-603:2023
ICS:
31.180 Tiskana vezja (TIV) in tiskane Printed circuits and boards
plošče
31.190 Sestavljeni elektronski Electronic component
elementi assemblies
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
91/1901/CDV
COMMITTEE DRAFT FOR VOTE (CDV)
PROJECT NUMBER:
IEC 62878-2-603 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2023-10-20 2024-01-12
SUPERSEDES DOCUMENTS:
91/1802/CD, 91/1831/CC
IEC TC 91 : ELECTRONICS ASSEMBLY TECHNOLOGY
SECRETARIAT: SECRETARY:
Japan Mr Osamu IKEDA
OF INTEREST TO THE FOLLOWING COMMITTEES: PROPOSED HORIZONTAL STANDARD:
Other TC/SCs are requested to indicate their interest, if any,
in this CDV to the secretary.
FUNCTIONS CONCERNED:
EMC ENVIRONMENT QUALITY ASSURANCE SAFETY
SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
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CENELEC, is drawn to the fact that this Committee Draft for
Vote (CDV) is submitted for parallel voting.
The CENELEC members are invited to vote through the
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TITLE:
Device embedding assembly technology - Part 2-603: Guideline for stacked electronic module - Test
method of intra-module electrical connectivity
PROPOSED STABILITY DATE: 2024
NOTE FROM TC/SC OFFICERS:
electronic file, to make a copy and to print out the content for the sole purpose of preparing National Committee positions.
You may not copy or "mirror" the file or printed version of the document, or any part of it, for any other purpose without
permission in writing from IEC.
IEC CDV 62878-2-603 © IEC 2023 2 91/1901/CDV
1 CONTENTS
3 FOREWORD . 3
4 INTRODUCTION . 5
5 1 Scope . 6
6 2 Normative references . 6
7 3 Terms definitions and abbreviated terms . 6
8 3.1 Terms and definitions . 6
9 3.2 Abbreviated terms . 6
10 Terms and definitions . 6
11 4 General . 6
12 5 Test specimen . 8
13 5.1 General . 8
14 5.2 Preparation of test specimen . 8
15 6 Test apparatus . 9
16 7 Test method and test procedure . 10
17 7.1 General . 10
19 Figure 1. SAEM (Stackable electronic module) . 7
20 Figure 2. SDEM（Stacked electronic module） . 7
21 Figure 3. Inter-module connection and intra-module connection . 8
22 Figure 4. Image drawing of the test specimen . 9
23 Figure 5. Test apparatus . 10
24 Figure 6. Test procedure . 11
26 Table A. Representatives of bidirectional serial communication bus interface . 12
IEC CDV 62878-2-603 © IEC 2023 3 91/1901/CDV
32 INTERNATIONAL ELECTROTECHNICAL COMMISSION
33 ____________
35 DEVICE EMBEDDING ASSEMBLY TECHNOLOGY
37 Part 2-603: Guideline for stacked electronic module –
38 Test method of intra-module electrical connectivity
41 FOREWORD
42 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national
43 electrotechnical committees (IEC National Committees). The object of IEC is to promote international co -operation on all
44 questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities ,
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50 the two organizations.
51 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus
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67 use of, or reliance upon, this IEC Publication or any other IEC Publications.
68 8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable
69 for the correct application of this publication.
70 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights.
71 IEC shall not be held responsible for identifying any or all such patent rights.
72 IEC 62878-2-603 has been prepared by IEC technical committee 91: Electronics assembly technology.
73 It is an International Standard.
74 The text of International Standard is based on the following documents:
Draft Report on voting
XX/XX/FDIS XX/XX/RVD
76 Full information on the voting for its approval can be found in the report on voting indicated in the above
77 table.
78 The language used for the development of this International Standard is English.
79 This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in accordance
80 with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available at
IEC CDV 62878-2-603 © IEC 2023 4 91/1901/CDV
81 www.iec.ch/members_experts/refdocs. The main document types developed by IEC are described in
82 greater detail at www.iec.ch/standardsdev/publications.
83 The committee has decided that the contents of this document will remain unchanged until the stability
84 date indicated on the IEC website under webstore.iec.ch in the data related to the specific document.
85 At this date, the document will be
86 • reconfirmed,
87 • withdrawn,
88 • replaced by a revised edition, or
89 • amended.
IEC CDV 62878-2-603 © IEC 2023 5 91/1901/CDV
91 INTRODUCTION
92 High-end servers, network systems, PCs and smart phones have been driving the electronic assembly
93 technologies for the last couple of decades. In order to meet higher demands in computing load from
94 cloud computing and large scale of datacenters with low energy consumption and cost-effective manner,
95 IoT and edge computing devices must achieve greater miniaturization and densification. Stacked
96 electronic module which offers complex and simultaneous integration of various functional modules and
97 specific features is a solution that can meet these demands. The stacked electronic module is produced
98 by means of stacking some stackable electronic modules. The stackable electronic module usually
99 mounts components with area array type package (BGA, LGA, and similar) on the surface and does
100 embed components with wafer-level type package or bare chip into the inner layer to achieve
101 miniaturization and densification. However from a viewpoint of test and diagnosis the stacked electronic
102 module becomes an invisible, untouchable and undiagnosed structure. Due to its design and
103 construction complexity, it is increasingly critical to test a stacked electronic module with a combination
104 of conventional methods such as external input/output (I/O) terminal or in-circuit test with advanced
105 methods (e.g. boundary scan or bi-directional bus control).
106 This document is one of a series of guidelines for stacked electronic modules.
IEC CDV 62878-2-603 © IEC 2023 6 91/1901/CDV
112 DEVICE EMBEDDING ASSEMBLY TECHNOLOGY
114 Part 2-603: Guideline for stacked electronic module –
115 Test method of intra-module electrical connectivity
117 1 Scope
118 This document specifies the electrical test method to detect electrical connectivity defects of the stacked
119 electronic module caused by the stacking assembly process to stack some stackable electronic modules.
120 This method is realized to make use of bidirectional serial communication bus interface applied to the
121 stackable electronic modules which are assured as Known Good Module.
123 2 Normative references
124 The following documents are referred to in the text in such a way that some or all of their content
125 constitutes requirements of this document. For dated references, only the edition cited applies. For
126 undated references, the latest edition of the referenced document (including any amendments) applies.
127 IEC 62878-2-602, Guideline for stacked electronic module – Test method of inter-module electrical
128 connectivity
130 3 Terms definitions and abbreviated terms
131 3.1 Terms and definitions
132 For the purposes of this document, the terms and definitions given in IEC 60194-2 and the following
133 apply.
134 ISO and IEC maintain terminological databases for use in standardization at the following addresses:
135 • IEC Electropedia: available at https://www.electropedia.org/
136 • ISO Online browsing platform: available at https://www.iso.org/obp
137 3.1 known good module (KGM)
138 electronic module, which meets quality, reliability, performance and functionality as agreed upon
139 between customer and supplier
141 3.2 Abbreviated terms
142 SAEM : stackable electronic module
143 SDEM： stacked electronic module
146 Terms and definitions
148 4 General
149 The SDEM is produced by means of stacking at least more than two stackable electronic modules. The
150 SAEM usually mounts components with area array type package on the surface and does embed
oSIST prEN IEC 62878-2-603
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