SIST EN IEC 61189-5-501:2021

Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-501: General test methods for materials and assemblies - Surface insulation resistance (SIR) testing of solder fluxes

This part of IEC 61189 is used to quantify the deleterious effects of flux residues on surface
insulation resistance (SIR) in the presence of moisture.
Interdigitated comb patterns comprising long parallel electrodes on an IPC B53 standardized
test coupon are used for the evaluation. Coupons are conditioned and measurements taken at
a high temperature and humidity. The electrodes are electrically biased during conditioning to
facilitate electrochemical reactions, as shown in Figure 1 and Figure 3.
Reference can be made to IEC TR 61189-5-506, which examines different geometry comb
patterns: 400 μm x 500 μm; 400 μm x 200 μm; and 318 μm x 318 μm.
Specifically, this method is designed to simultaneously assess:
• leakage current caused by ionized water films and electrochemical degradation of test
vehicle, (corrosion, dendritic growth);
• provide metrics that can appropriately be used for binary classification (e.g. go/no go;
pass/fail);
• compare, rank or characterize materials and processes.
This test is carried out at high humidity and heat conditions.

Prüfverfahren für Elektromaterialien, Leiterplatten und andere Verbindungsstrukturen und Baugruppen – Teil 5-501: Allgemeine Prüfverfahren für Materialien und Baugruppen – Prüfung des Oberflächenisolationswiderstands (SIR) von Lotflussmitteln

Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres structures d’interconnexion et ensembles - Partie 5-501: Méthodes d’essai générales pour les matériaux et les ensembles - Essais de résistance d’isolement en surface (RIS) des flux de brasage

L’IEC 61189-5-501:2021 est utilisée pour quantifier les effets délétères des résidus de flux sur la résistance d’isolement en surface (RIS) en présence d’humidité.

Preskusne metode za električne materiale, tiskane plošče ter druge povezovalne strukture in sestave - 5-501. del: Splošne preskusne metode za materiale in sestave - Preskušanje površinske izolacijske upornosti spajkalne paste

General Information

• Status: Published
• Publication Date: 03-May-2021
• ICS: 31.180 - Printed circuits and boards
• ICS: 31.190 - Electronic component assemblies
• Technical Committee: ITIV - Electronics assembly technology and Environmental standardization
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 18-Mar-2021
• Due Date: 23-May-2021
• Completion Date: 04-May-2021
• Ref Project: EN IEC 61189-5-501:2021 - Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-501: General test methods for materials and assemblies - Surface insulation resistance (SIR) testing of solder fluxes

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN IEC 61189-5-501:2021
01-junij-2021
Preskusne metode za električne materiale, tiskane plošče ter druge povezovalne
strukture in sestave - 5-501. del: Splošne preskusne metode za materiale in
sestave - Preskušanje površinske izolacijske upornosti spajkalne paste
Test methods for electrical materials, printed boards and other interconnection structures
and assemblies - Part 5-501: General test methods for materials and assemblies -
Surface insulation resistance (SIR) testing of solder fluxes
Ta slovenski standard je istoveten z: EN IEC 61189-5-501:2021
ICS:
31.180 Tiskana vezja (TIV) in tiskane Printed circuits and boards
plošče
31.190 Sestavljeni elektronski Electronic component
elementi assemblies
SIST EN IEC 61189-5-501:2021 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN IEC 61189-5-501:2021

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SIST EN IEC 61189-5-501:2021


EUROPEAN STANDARD EN IEC 61189-5-501

NORME EUROPÉENNE

EUROPÄISCHE NORM
March 2021
ICS 31.180

English Version
Test methods for electrical materials, printed boards and other
interconnection structures and assemblies - Part 5-501: General
test methods for materials and assemblies - Surface insulation
resistance (SIR) testing of solder fluxes
(IEC 61189-5-501:2021)
Méthodes d'essai pour les matériaux électriques, les cartes Prüfverfahren für Elektromaterialien, Leiterplatten und
imprimées et autres structures d'interconnexion et andere Verbindungsstrukturen und Baugruppen - Teil 5-
ensembles - Partie 5-501: Méthodes d'essai générales pour 501: Allgemeine Prüfverfahren für Materialien und
les matériaux et les ensembles - Essais de résistance Baugruppen - Prüfung des
d'isolement en surface (RIS) des flux de brasage Oberflächenisolationswiderstands (SIR) von Lotflussmitteln
(IEC 61189-5-501:2021) (IEC 61189-5-501:2021)
This European Standard was approved by CENELEC on 2021-03-02. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.



European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2021 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN IEC 61189-5-501:2021 E

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SIST EN IEC 61189-5-501:2021
EN IEC 61189-5-501:2021 (E)
European foreword
The text of document 91/1645/CDV, future edition 1 of IEC 61189-5-501, prepared by IEC/TC 91
“Electronics assembly technology” was submitted to the IEC-CENELEC parallel vote and approved by
CENELEC as EN IEC 61189-5-501:2021.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2021-12-02
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2024-03-02
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 61189-5-501:2021 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 61189-1 NOTE Harmonized as EN 61189-1
IEC 61189-3 NOTE Harmonized as EN 61189-3
IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1
IEC 61190-1-2:2014 NOTE Harmonized as EN 61190-1-2:2014 (not modified)
IEC 61191-1 NOTE Harmonized as EN IEC 61191-1
ISO 9455-1 NOTE Harmonized as EN 29455-1
ISO 9455-2 NOTE Harmonized as EN ISO 9455-2
ISO 9455-17 NOTE Harmonized as EN ISO 9455-17
2

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SIST EN IEC 61189-5-501:2021
EN IEC 61189-5-501:2021 (E)
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1 Where an International Publication has been modified by common modifications, indicated by (mod), the
relevant EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available
here: www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 60068-1 2013 Environmental testing - Part 1: EN 60068-1 2014
General and guidance
IEC 60068-2-58 - Environmental testing - Part 2–58: EN 60068-2-58 -
Tests - Test Td: Test methods for
solderability, resistance to dissolution
of metallization and to soldering heat
of surface mounting devices (SMD)
IEC 60068-2-67 - Environmental testing - Part 2–67: EN 60068-2-67 -
Tests - Test Cy: Damp heat, steady-
state, accelerated test primarily
intended for components
IEC 60068-2-78 - Environmental testing - Part 2–78: EN 60068-2-78 -
Tests - Test Cab: Damp heat, steady-
state
IEC 60194-2 - Printed boards design, manufacture - -
and assembly - Vocabulary - Part 2:
Common usage in electronic
technologies as well as printed board
and electronic assembly technologies
IEC 61189-5-504 - Test methods for electrical materials, EN -
printed boards and other IEC 61189-5-504
interconnection structures and
assemblies - Part 5–504: General test
methods for materials and assemblies
- Process ionic contamination testing
(PICT)
3

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SIST EN IEC 61189-5-501:2021
EN IEC 61189-5-501:2021 (E)
IEC/TR 61189-5-506 - Test methods for electrical materials, - -
printed boards and other
interconnection structures and
assemblies - Part 5–506: General test
methods for materials and assemblies
- An intercomparison evaluation to
implement the use of fine-pitch test
structures for surface insulation
resistance (SIR) testing of solder
fluxes in accordance with
IEC 61189-5-501
IEC 61190-1-3 - Attachment materials for electronic EN IEC 61190-1-3 -
assembly - Part 1–3: Requirements
for electronic grade solder alloys and
fluxed and non-fluxed solid solder for
electronic soldering applications
IEC 61249-2-7 - Materials for printed boards and other EN 61249-2-7 -
interconnecting structures - Part 2–7:
Reinforced base materials clad and
unclad - Epoxide woven E-glass
laminated sheet of defined
flammability (vertical burning test),
copper-clad


4

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SIST EN IEC 61189-5-501:2021




IEC 61189-5-501

®


Edition 1.0 2021-01




INTERNATIONAL



STANDARD




NORME


INTERNATIONALE
colour

inside










Test methods for electrical materials, printed boards and other interconnection

structures and assemblies –

Part 5-501: General test methods for materials and assemblies – Surface

insulation resistance (SIR) testing of solder fluxes



Méthodes d’essai pour les matériaux électriques, les cartes imprimées et autres


structures d’interconnexion et ensembles –

Partie 5-501: Méthodes d’essai générales pour les matériaux et les ensembles –

Essais de résistance d’isolement en surface (RIS) des flux de brasage











INTERNATIONAL

ELECTROTECHNICAL

COMMISSION


COMMISSION

ELECTROTECHNIQUE


INTERNATIONALE




ICS 31.180 ISBN 978-2-8322-9289-1




Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale

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SIST EN IEC 61189-5-501:2021
– 2 – IEC 61189-5-501:2021 © IEC 2021
CONTENTS
FOREWORD . 4
1 Scope . 6
2 Normative references . 6
3 Terms and definitions . 7
4 Equipment/Apparatus . 7
4.1 Measurement instrument . 7
4.2 Resistor verification coupon . 8
4.3 Damp heat chamber . 8
4.4 Additional apparatus . 9
4.4.1 Ionic contamination test system . 9
4.4.2 Drying oven . 9
4.4.3 Camera . 9
4.4.4 Backlight panel . 9
5 Test coupons . 9
5.1 General . 9
5.2 IEC TB144 (IPC B53) test coupon . 9
5.3 Laminate . 10
5.4 Coupons for testing . 10
5.5 Chamber controls . 10
5.6 Blank process controls . 11
5.7 Test conditions . 11
5.7.1 Fluxes not intended for cleaning . 11
5.7.2 Fluxes intended for cleaning . 11
5.8 Test duration. 11
5.9 Test voltage . 11
5.10 Connecting the test coupons . 11
5.10.1 General . 11
5.10.2 Connector/test rack . 11
5.10.3 Direct wiring . 12
5.11 Cable connection . 12
5.12 Coupon orientation in the chamber . 12
6 Coupon preparation . 13
6.1 General . 13
6.2 Coupon cleaning . 13
6.3 Identification . 13
6.4 Inspection . 13
6.5 Storage . 13
6.6 No clean fluxes . 14
6.7 Cleanable type fluxes . 14
6.8 Solder paste coupons . 14
6.8.1 Coupon preparation . 14
6.8.2 Cleaning of coupons . 15
6.9 Preparation of coupons for chamber . 15
7 Test procedure . 15
8 Measurements . 15
9 Evaluation . 15

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SIST EN IEC 61189-5-501:2021
IEC 61189-5-501:2021 © IEC 2021 – 3 –
10 Reporting. 16
Annex A (informative) General advice for testing . 17
A.1 Test coupons . 17
A.2 Test coupon development . 17
A.3 Sampling. 17
A.3.1 General . 17
A.3.2 Coupon count . 17
A.3.3 Sample sizes . 17
A.3.4 Characterising materials . 17
A.3.5 Characterising process(es) . 17
A.3.6 Derived unit of SIR . 17
A.3.7 Set-up parameters . 18
A.4 Humidity . 18
A.5 Voltage . 18
Bibliography . 19

Figure 1 – SIR pattern . 6
Figure 2 – Example of a resistor verification coupon . 8
Figure 3 – IPC B53 Surface insulation resistance pattern . 10
Figure 4 – Connector arrangement . 12
Figure 5 – Specimen orientation in test chamber . 12
Figure 6 – Coupon orientation in test chamber . 13

Table 1 – Coupons for surface insulation resistance (SIR) testing . 14

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– 4 – IEC 61189-5-501:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS
AND OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 5-501: General test methods for materials and assemblies –
Surface insulation resistance (SIR) testing of solder fluxes

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
IEC 61189-5-501 has been prepared by IEC technical committee 91: Electronics assembly
technology. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
91/1645/CDV 91/1672/RVC

Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/standardsdev/publications.

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SIST EN IEC 61189-5-501:2021
IEC 61189-5-501:2021 © IEC 2021 – 5 –
A list of all parts in the IEC 61189 series, published under the general title Test methods for
electrical materials, printed boards and other interconnection structures and assemblies, can
be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.

IMPORTANT – The "colour inside" logo on the cover page of this document indicates
that it contains colours which are considered to be useful for the correct understanding
of its contents. Users should therefore print this document using a colour printer.

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TEST METHODS FOR ELECTRICAL MATERIALS, PRINTED BOARDS
AND OTHER INTERCONNECTION STRUCTURES AND ASSEMBLIES –

Part 5-501: General test methods for materials and assemblies –
Surface insulation resistance (SIR) testing of solder fluxes


1 Scope
This part of IEC 61189 is used to quantify the deleterious effects of flux residues on surface
insulation resistance (SIR) in the presence of moisture.
Interdigitated comb patterns comprising long parallel electrodes on an IPC B53 standardized
test coupon are used for the evaluation. Coupons are conditioned and measurements taken at
a high temperature and humidity. The electrodes are electrically biased during conditioning to
facilitate electrochemical reactions, as shown in Figure 1 and Figure 3.
Reference can be made to IEC TR 61189-5-506, which examines different geometry comb
patterns: 400 µm x 500 µm; 400 µm x 200 µm; and 318 µm x 318 µm.

Figure 1 – SIR pattern
Specifically, this method is designed to simultaneously assess:
• leakage current caused by ionized water films and electrochemical degradation of test
vehicle, (corrosion, dendritic growth);
• provide metrics that can appropriately be used for binary classification (e.g. go/no go;
pass/fail);
• compare, rank or characterize materials and processes.
This test is carried out at high humidity and heat conditions.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60068-1:2013, Environmental testing – Part 1: General and guidance
IEC 60068-2-58, Environmental testing – Part 2-58: Tests – Test Td: Test methods for
solderability, resistance to dissolution of metallization and to soldering heat of surface mounting
devices (SMD)
IEC 60068-2-67, Environmental testing – Part 2-67: Tests – Test Cy: Damp heat, steady state,
accelerated test primarily intended for components

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SIST EN IEC 61189-5-501:2021
IEC 61189-5-501:2021 © IEC 2021 – 7 –
IEC 60068-2-78, Environmental testing – Part 2-78: Tests – Test Cab: Damp heat, steady state
IEC 60194-2, Printed boards design, manufacture and assembly – Vocabulary – Part 2:
Common usage in electronic technologies as well as printed board and electronic assembly
technologies
IEC 61189-5-504, Test methods for electrical materials, printed board and other interconnection
structures and assemblies – Part 5-504: General test methods for materials and assemblies –
Process ionic contamination testing (PICT)
IEC TR 61189-5-506, Test methods for electrical materials, printed boards and other
interconnection structures and assemblies – Part 5-506: General test methods for materials and
assemblies – An intercomparison evaluation to implement the use of fine pitch test structures
for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-
501
IEC 61190-1-3, Attachment materials for electronic assembly – Part 1-3: Requirements for
electronic grade solder alloys and fluxed and non-fluxed solid solder for electronic soldering
applications
IEC 61249-2-7, Materials for printed boards and other interconnecting structures – Part 2-7:
Reinforced base materials clad and unclad – Epoxide woven E-glass laminated sheet of defined
flammability (vertical burning test), copper-clad
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60068-1, IEC 60068-
2-58, IEC 60194-2, and IEC 61190-1-3 apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
4 Equipment/Apparatus
4.1 Measurement instrument
This shall consist of a measuring device capable of measuring insulation resistance in the range
6 12
of at least 10 Ω to 10 Ω.
It shall be capable of measuring and recording each individual test channel/pattern. The
measurement circuit shall incorporate a 1 MΩ current limiting resistor in each current pathway.
The tolerance of the total measurement system shall be
10
• ±5 % up to 10 Ω at 5 V;
10 11
• ±10 % between 10 Ω to 10 Ω at 5 V;
11
• ±20 % above 10 Ω at 5 V.
If a different test voltage is to be used, the measurement circuit shall be assessed at that voltage
rather than the 5 V stipulated. See Clause A.5 for additional information on test voltages.
The resistors used to confirm the ‘total measurement system tolerance’ defined above, shall
have a purchased tolerance of
6
• ±0,1 % up to and including 10 Ω;
6 8
• ±1 % above 10 Ω and up to and including 10 Ω;
8 10
• ±5 % above 10 Ω and up to and including 10 Ω;
10
• ±10 % above 10 Ω.

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The instrument can be used with either an external or internal power supply but shall be capable
of delivering a variable voltage from (5 to 100) V DC ±1 % with a 1 MΩ load and a channel to
13
channel isolation resistance of 10 Ω.
The system shall be capable of taking measurements in the time interval required.
Equipment shall have the measurement capability to repeat the resistance measurement on all
channels at least every 20 minutes.
4.2 Resistor verification coupon
The measurement system measurement performance shall be verified by substituting a resistor
verification coupon (see Figure 2) in place of the test coupons while in the chamber at both
ambient and elevated conditions. This coupon should be fitted with at least 4 “known value”
resistors. The tolerances for the “known value” resistors shall be as per the purchased
tolerances defined in 4.1.

Figure 2 – Example of a resistor verification coupon
4.3 Damp heat chamber
A damp heat chamber capable of being adjusted to a temperature of 20 °C ± 2 °C to
°
C and of relative humidity between 80 % RH ± 3 % RH and 90 % RH ± 3% RH
100 °C ± 2
according to IEC 60068-2-67 and IEC 60068-2-78 shall be used.
If the alternative conditions of 40 °C / 93 % RH are to be used, the damp heat chamber shall
be capable of the upper humidity level of 93 % RH ± 3 % RH rather than the 90 %
...