SIST EN 62137:2005

Environmental and endurance testing - Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LGA, SON and QFN

Specifies the test method and guidelines for evaluating the quality and reliability of boards, solder lands, solder process and solder joints of reflow solder mounted area array type packages and peripheral terminal type packages. Tests for durability against mechanical and thermal stress received during or after the mounting process of discrete semiconductor devices and of integrated circuits used mainly for industrial and consumer use equipment.

Umwelt- und Dauerprüfung - Prüfverfahren für in Oberflächenmontagetechnik bestückte Leiterplatten mit Area-Array-Bauelementen der Bauformen FBGA, BGA, FLGA, LGA, SON und QFN

Essais d'environnement et d'endurance - Méthodes d'essai pour les cartes à montage en surface de boîtiers de type matriciel FBGA, BGA, FLGA, LGA, SON et QFN

Specifies the test method and guidelines for evaluating the quality and reliability of boards, solder lands, solder process and solder joints of reflow solder mounted area array type packages and peripheral terminal type packages. Tests for durability against mechanical and thermal stress received during or after the mounting process of discrete semiconductor devices and of integrated circuits used mainly for industrial and consumer use equipment.

Okoljsko in vzdržljivostno preskušanje – Preskusne metode za površinsko vgrajene plošče z ohišji s ploskovnimi nizi tipa FBGA, BGA, FLGA, LGA, SON in QFN

General Information

• Status: Published
• Publication Date: 31-Aug-2005
• ICS: 19.040 - Environmental testing
• ICS: 31.190 - Electronic component assemblies
• Technical Committee: ITIV - Electronics assembly technology and Environmental standardization
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 01-Sep-2005
• Due Date: 01-Sep-2005
• Completion Date: 01-Sep-2005
• Ref Project: EN 62137:2004 - Environmental and endurance testing - Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LGA, SON and QFN

Relations

• Replaced By: SIST EN 62137-4:2015 - Electronics assembly technology - Part 4: Endurance test methods for solder joint of area array type package surface mount devices
• Effective Date: 01-Sep-2015
• Replaced By: SIST EN 62137-4:2015 - Electronics assembly technology - Part 4: Endurance test methods for solder joint of area array type package surface mount devices
• Effective Date: 29-Jan-2023

Standards Content (Sample)

SLOVENSKI SIST EN 62137:2005

STANDARD
september 2005
Okoljsko in vzdržljivostno preskušanje – Preskusne metode za površinsko
vgrajene plošče z ohišji s ploskovnimi nizi tipa FBGA, BGA, FLGA, LGA, SON
in QFN
Environmental and endurance testing – Test methods for surface-mount boards of
area array type packages FBGA, BGA, FLGA, LGA, SON and QFN
ICS 19.040; 31.190 Referenčna številka
SIST EN 62137:2005(en)
©  Standard je založil in izdal Slovenski inštitut za standardizacijo. Razmnoževanje ali kopiranje celote ali delov tega dokumenta ni dovoljeno

---------------------- Page: 1 ----------------------

EUROPEAN STANDARD EN 62137
NORME EUROPÉENNE
EUROPÄISCHE NORM August 2004

ICS 31.190


English version


Environmental and endurance testing -
Test methods for surface-mount boards of area array type packages
FBGA, BGA, FLGA, LGA, SON and QFN
(IEC 62137:2004)


Essai d'environnement et d'endurance - Umwelt- und Dauerprüfung -
Méthodes d'essai des cartes montées Prüfverfahren für in
en surface à boîtiers de type Oberflächenmontagetechnik bestückte
FBGA, BGA, FLGA, LGA, SON et QFN Leiterplatten mit Area-Array-
(CEI 62137:2004) Bauelementen der Bauformen
FBGA, BGA, FLGA, LGA, SON und QFN
(IEC 62137:2004)





This European Standard was approved by CENELEC on 2004-07-01. CENELEC members are bound to
comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European
Standard the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and
notified to the Central Secretariat has the same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Cyprus, Czech
Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden,
Switzerland and United Kingdom.

CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung

Central Secretariat: rue de Stassart 35, B - 1050 Brussels


© 2004 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.

Ref. No. EN 62137:2004 E

---------------------- Page: 2 ----------------------

EN 62137:2004 - 2 -
Foreword
The text of document 91/444/FDIS, future edition 1 of IEC 62137, prepared by IEC TC 91, Electronics
assembly technology, was submitted to the IEC-CENELEC parallel vote and was approved by
CENELEC as EN 62137 on 2004-07-01.
The following dates were fixed:

– latest date by which the EN has to be implemented

at national level by publication of an identical
(dop) 2005-04-01
national standard or by endorsement

– latest date by which the national standards conflicting
(dow) 2007-07-01
with the EN have to be withdrawn
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 62137:2004 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 60068-2-44 NOTE Harmonized as EN 60068-2-44:1995 (not modified).
IEC 60749-1 NOTE Harmonized as EN 60749-1:2003 (not modified).
IEC 60749-20 NOTE Harmonized as EN 60749-20:2003 (not modified).
IEC 61189-3 NOTE Harmonized as EN 61189-3:1997 (not modified).
IEC 61760-1 NOTE Harmonized as EN 61760-1:1998 (not modified).
__________

---------------------- Page: 3 ----------------------

- 3 - EN 62137:2004
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.
NOTE Where an international publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.
Publication Year Title EN/HD Year
1)
IEC 60068-1 1988 Environmental testing EN 60068-1 1994
Part 1: General and guidance

IEC 60191-6-2 2001 Mechanical standardization of EN 60191-6-2 2002
semiconductor devices
Part 6-2: General rules for the preparation
of outline drawings of surface mounted
semiconductor device packages - Design
guide for 1,50 mm, 1,27 mm and 1,00 mm
pitch ball and column terminal packages

IEC 60191-6-5 2001 Part 6-5: General rules for the preparation EN 60191-6-5 2001
of outline drawings of surface mounted
semiconductor device packages - Design
guide for fine-pitch ball grid array (FBGA)

2) 3)
IEC 61190-1-1 - Attachment materials for electronic EN 61190-1-1 2002
assembly
Part 1-1: Requirements for soldering fluxes
for high-quality interconnections in
electronics assembly

2) 3)
IEC 61190-1-2 - Part 1-2: Requirements for solder pastes EN 61190-1-2 2002
for high-quality interconnections in
electronics assembly

2) 3)
IEC 61190-1-3 - Part 1-3: Requirements for electronic EN 61190-1-3 2002
grade solder alloys and fluxed and non-
fluxed solid solders for electronic soldering
applications

JEITA ETR-7001 1998 Terms and definitions for surface mount - -
device



1)
EN 60068-1 includes corrigendum October 1988 + A1:1992 to IEC 60068-1.
2)
Undated reference.
3)
Valid edition at date of issue.

---------------------- Page: 4 ----------------------

NORME CEI
INTERNATIONALE IEC
62137
INTERNATIONAL
Première édition
STANDARD
First edition
2004-07
Essais d'environnement et d'endurance –
Méthodes d'essai pour les cartes à montage
en surface de boîtiers de type matriciel
FBGA, BGA, FLGA, LGA, SON et QFN
Environmental and endurance testing –
Test methods for surface-mount boards
of area array type packages
FBGA, BGA, FLGA, LGA, SON and QFN
” IEC 2005 Droits de reproduction réservés  Copyright - all rights reserved
Aucune partie de cette publication ne peut être reproduite ni No part of this publication may be reproduced or utilized in any
utilisée sous quelque forme que ce soit et par aucun procédé, form or by any means, electronic or mechanical, including
électronique ou mécanique, y compris la photocopie et les photocopying and microfilm, without permission in writing from
microfilms, sans l'accord écrit de l'éditeur. the publisher.
International Electrotechnical Commission, 3, rue de Varembé, PO Box 131, CH-1211 Geneva 20, Switzerland
Telephone: [phone] Telefax: [phone] E-mail: [e-mail] Web: www.iec.ch
CODE PRIX
Commission Electrotechnique Internationale PRICE CODE U
International Electrotechnical Commission
ɆɟɠɞɭɧɚɪɨɞɧɚɹɗɥɟɤɬɪɨɬɟɯɧɢɱɟɫɤɚɹɄɨɦɢɫɫɢɹ
Pour prix, voir catalogue en vigueur
For price, see current catalogue

---------------------- Page: 5 ----------------------

62137 © IEC:2005 – 3 –
CONTENTS
FOREWORD.7
1 Scope .11
2 Normative references .11
3 Terms and definitions .13
4 Abbreviations .13
5 Solder joint quality test methods .13
5.1 Reflow solderability test for solder joint .13
5.2 Reserved for future use .19
6 Mechanical test methods .19
6.1 Bending test for solder joint .19
6.2 Drop test for solder joint .19
7 Environment test methods .21
7.1 Temperature cycling test for solder joint.21
7.2 Reserved for future use .27
Annex A (informative) Informative test methods for test board – Guidance .29
Annex B (informative) Standard mounting process for area array type packages and
peripheral terminal type packages (QFN and SON).51
Bibliography .57
Figure 1 – Temperature measurement of the specimen using thermocouples .17
Figure 2 – Moistening/reflow process cycle proposed .17
Figure 3 – Reflow profile .19
Figure 4 – Configuration of one cycle period.23
Figure A.1 – Temperature measurement of the specimen using thermocouples .31
Figure A.2 – Temperature measurement of the specimen using thermocouples .35
Figure A.3 – Measuring methods for peel strength .39
Figure A.4 – Standard land shape of the mount reliability test board .45
Figure A.5 – Design standard for land shape of packages of peripheral terminal type
SON and QFN .47

---------------------- Page: 6 ----------------------

62137 © IEC:2005 – 5 –
Table 1 – Temperature cycling test conditions .25
Table A.1 – Types of mount reliability test board .43
Table A.2 – Standard mount reliability test board layer configuration.45
Table A.3 – Design guideline for land size of packages of area array ball/land type
BGA, FBGA, LGA, and FLGA .47
Table B.1 – Stencil design standard for area array type packages.51
Table B.2 – Stencil design standard for peripheral terminal type packages.51

---------------------- Page: 7 ----------------------

62137 © IEC:2005 – 7 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
ENVIRONMENTAL AND ENDURANCE TESTING –
TEST METHODS FOR SURFACE-MOUNT BOARDS OF AREA ARRAY
1
TYPE PACKAGES FBGA, BGA, FLGA, LGA, SON AND QFN
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62137 has been prepared by IEC technical committee 91:
Electronics assembly technology.
This bilingual version (2005-02) replaces the English version.
The text of this standard is based on the following documents:
FDIS Report on voting
91/444/FDIS 91/451/RVD
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
___________
1
 FBGA fine-pitch ball grid array
BGA ball grid array
FLGA fine-pitch land grid array
LGA land grid array
SON small outline non-leaded package
QFN quad flat-pack non-leaded package

---------------------- Page: 8 ----------------------

62137 © IEC:2005 – 9 –
The French version of this standard has not been voted upon.
This publication takes into account Corrigendum 1 (2005) relating to the English version.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
The committee has decided that the contents of this publication will remain unchanged until
the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in
the data related to the specific publication. At this date, the publication will be
• reconfirmed;
• withdrawn;
• replaced by a revised edition, or
• amended.

---------------------- Page: 9 ----------------------

62137 © IEC:2005 – 11 –
ENVIRONMENTAL AND ENDURANCE TESTING –
TEST METHODS FOR SURFACE-MOUNT BOARDS OF AREA ARRAY
TYPE PACKAGES FBGA, BGA, FLGA, LGA, SON AND QFN
1 Scope
This International Standard specifies the test method and guidelines for evaluating the quality
and reliability of boards, solder lands, solder process and solder joints of reflow solder
mounted area array type packages and peripheral terminal type packages.
This standard tests for durability against mechanical and thermal stress received during or
after the mounting process of discrete semiconductor devices and of integrated circuits
(hereinafter both referred to as semiconductor devices) used mainly for industrial and
consumer use equipment.
The test method specified in this standard is an integrated one by including the evaluation
method of mounting methods, mounting conditions, printed circuit boards, soldering materials,
and so on. It does not specify the evaluation method of the individual semiconductor devices.
Mounting conditions, printed wiring boards, soldering materials, and so on significantly affect
the result of the test specified in this standard. Therefore, the test specified in this standard
shall not be regarded as the one to be used to guarantee the mounting reliability of the
semiconductor devices.
The test method is not necessary if there is no stress (mechanical or others) from any of the
tests covered in this standard.
2 Normative references
The following referenced documents are indispensable for the application of this document.
For dated references, only the edition cited applies. For undated references, the latest edition
of the referenced document (including any amendments) applies.
IEC 60068-1:1988, Environmental testing – Part 1: General and guidance
IEC 60191-6-2:2001, Mechanical standardization of semiconductor devices – Part 6-2:
General rules for the preparation of outline drawings of surface mounted semiconductor
device packages – Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column
terminal packages
IEC 60191-6-5:2001, Mechanical standardization of semiconductor devices – Part 6-5:
General rules for the preparation of outline drawings of surface mounted semiconductor
device packages – Design guide for fine-pitch ball grid array (FBGA)

---------------------- Page: 10 ----------------------

62137 © IEC:2005 – 13 –
2
JEITA ETR-7001:1998, Terms and definitions for surface mount technology
3 Terms and definitions
For the purposes of this document, the terms and definitions for BGA, FBGAand so on, are
referred to in IEC 60191-6-2 and IEC 60191-6-5
4 Abbreviations
FBGA fine-pitch ball grid array
BGA ball grid array
FLGA fine-pitch land grid array
LGA land grid array
SON small outline non-leaded package
QFN quad flat-pack non-leaded package
5 Solder joint quality test methods
5.1 Reflow solderability test for solder joint
5.1.1 Purpose
This test method specifies the reflow solderability test for the solder joint, as part of the
specification in the standard. It is used to evaluate the solderability of reflow soldering of
area-array type packages and peripheral terminal type packages (QFN and SON).
5.1.2 Test specimen
The test specimen shall satisfy the following conditions:
a) test board design (see Clause A.4);
b) standard mounting process (see Annex B);
c) resistance to reflow soldering (see Clause A.1), solderability test for test board land (see
Clause A.2) and peel test method for test board land (see Clause A.3).
5.1.3 Test apparatus
The test apparatus shall include the following:
a) Oven
The oven shall maintain the temperature specified in 5.1.4.2.
___________
2
Japan Electronics and Information Technology Industries Association.

---------------------- Page: 11 ----------------------

62137 © IEC:2005 – 15 –
b) Moistening equipment
The humidifier shall maintain the temperature and humidity specified in 5.1.4.2. No
reaction shall occur to the material of the oven at high temperatures. The water used for
the test shall be purified water or deionized water, with pH 6,0 to pH 7,2 at 23 °C, and with
a resistivity of 500 Ωm or higher.
c) Infrared reflow/air reflow furnace
The infrared reflow/air reflow furnace shall meet the heating process conditions specified
in 5.1.4.4.
5.1.4 Test procedure
5.1.4.1 Initial measurement
The initial measurement shall be carried out according to the items and conditions specified in
the individual standard.
5.1.4.2 Moisture treatment
The moisture treatment is desirable for the test because a soldering defect may occur with
moisture. “Defect of soldering” is defined in ETR-7001 as general failure of soldering.
a) Pre-treatment
Unless otherwise specified in the individual standard, the specimen subject to the
moistening reflow pre-treatment in b) shall be baked in the oven at (125 ± 5) °C for 24 h or
more.
b) Moistening process (1)
The specimen shall be moistened as specified in the individual standard. If there is no
such specification mentioned in the individual standard, the specimen shall be subject to
the moistening condition at 30 °C, with a relative humidity of 70 % for 96 h.
c) Moistening process (2)
When the specimen is subjected to the reflow process twice, the specimen reflow soldered
on the test board shall be moistened once again under the moistening condition as
specified in the individual standard.
In this case, by taking into consideration the moistening reflow characteristic of the test
board, it is desirable to set both the moisture soaking conditions and the moistening time
for the repeat version of the test. In general, it is desirable to set the moistening condition
to 30 °C, with a relative humidity of 70 %, or to 30 °C, with a relative humidity of 85 % up
to 165 h maximum.
5.1.4.3 Test conditions
a) Reflow profile measurement
The infrared reflow/air reflow furnace shall meet the heating process conditions specified
in Figure 3. The temperature of the specimen shall be measured at measurement Point A
(the centre on the top of the package) and measurement point B (the soldered inner part
of the terminal), shown in Figure 1.

---------------------- Page: 12 ----------------------

62137 © IEC:2005 – 17 –
Mold resin Measurement
Solder ball
point A㩷
Thermocouple
Board
Measurement
point B
Adhesives
IEC  630/04
Figure 1 – Temperature measurement of the specimen using thermocouples
b) Test process.
The board to be tested shall carry out the evaluation under similar conditions to that of the
actual usage of the board.
A proposal is shown in Figure 2.
Pre-treatment at Moistening process at
30 °C, RH 70 % x hour Reflow process
(125 ± 5) °C for 24 h
or more
Moistening process at
30 °C, RH 70 % x hour Reflow process
IEC  631/04
Figure 2 – Moistening/reflow process cycle proposed

---------------------- Page: 13 ----------------------

62137 © IEC:2005 – 19 –
5.1.4.4 Reflow heating
Mount the specimen on the mount reliability test board on which the solder paste has been
printed as described in Annex B.
1K/s to 4 K/s
Peak temperature
240 °C at maximum
1K/s to 4 K/s
3 K/s to 6 K/s
Pre-heating area
(150 ± 10) °C
(90 ± 30) s
Soldering area
(235 ± 5) °C
(10 to 30) s
Time
IEC  632/04
Figure 3 – Reflow profile
5.1.4.5 Post-treatment
After the test has been completed, if necessary, leave the specimen in the standard condition
for the time specified in the individual standard:
• standard temperature range: 15 °C to 35 °C;
• standard relative humidity: 25 % to 75 %;
• standard atmospheric pressure: 86 kPa to 106 kPa.
Refer to IEC 60068-1.
5.1.4.6 Evaluation
Measure the electrical characteristic of the specimen according to the individual standard.
Then, using soft X-ray inspection equipment, check the soldered condition. If necessary,
observe the cross-sectional view after the buried process of resin.
5.2 Reserved for future use
(Vacant).
6 Mechanical test methods
6.1 Bending test for solder joint
(Under consideration)
6.2 Drop test for solder joint
(Under consideration)
Temperature

---------------------- Page: 14 ----------------------

62137 © IEC:2005 – 21 –
7 Environment test methods
7.1 Temperature cycling test for solder joint
7.1.1 Purpose
This test method specifies the temperature cycling test for solder joints. It is an accelerated
test method to measure the life expectancy of semiconductor devices and of the solder joint
on the board by taking into consideration the assumed temperature increase when area array
type packages and peripheral terminal type packages (QFN and SON)mounted on the board
are working.
7.1.2 Test specimen
The test specimen shall satisfy the following conditions:
a) test board design (see Clause A.4);
b) standard mounting process (see Annex B);
c) reflow solderability (see 5.1), solderability test for test board land (see Clause A.2), and
peel test method for test board land (see Clause A.3).
7.1.3 Test apparatus
The test apparatus shall include the following:
a) Oven
The oven shall maintain the temperature specified in 7.1.4.2.
b) Moistening equipment
The humidifier shall maintain the temperature and humidity as specified in 7.1.4.2. No
reaction shall occur in the material of the oven at high temperatures. The water used for
the test shall be purified water or deionized water, with pH 6,0 to pH 7,2 at 23 °C, and with
a resistivity of 500 Ωm or higher.
c) Temperature cycling test oven
The temperature cycling test oven shall be of vapour phase type that meets the test
conditions of the temperature cycle profile specified in 7.1.4.3.
7.1.4 Test procedure
7.1.4.1 Initial measurement
The initial measurement shall be carried out according to the items and conditions specified in
the individual standard.
7.1.4.2 Moisture treatment
Before carrying out the evaluation test, the specimen shall be mounted according to the
standard mount conditions specified in Annex B, on the standard mount quality test board
specified in 5.1, Clauses A.1, A.2 and A.3.
a) Pre-treatment
Unless otherwise specified in the individual standard, the specimen subject to the
moistening reflow pre-treatment in b) shall be baked in the oven at (125 ± 5) °C for 24 h or
more.

---------------------- Page: 15 ----------------------

62137 © IEC:2005 – 23 –
b) Moistening process (1)
The specimen shall be moistened as specified in the individual standard. If there is no
such specification mentioned in the individual standard, the specimen shall be subject to
the moistening condition at 30 °C, with a relative humidity of 70 % for 96 h.
c) Moistening process (2)
When the specimen is subjected to the reflow process twice, the specimen reflow soldered
on the test board shall be moistened once again under the moistening condition as
specified in the individual standard.
In this case, by taking into consideration the moistening reflow characteristic of the test
board, it is desirable to set both the moisture soaking conditions and the moistening time
for the repeat version of the test. In general, it is desirable to set the moistening condition
to 30 °C, with a relative humidity of 70 %, or to 30 °C, with a relative humidity of 85 % up
to 165 h maximum.
7.1.4.3 Test conditions
Figure 4 defines the test of one cycle period. According to Table 1, the specimen shall be
tested starting at a low temperature. The test equipment shall be set so that the temperature
of the specimen is set to the values specified in Table 1.
Maximum storage
temperature
T
stg, max
Normal
temperature
T
n
Minimum storage
temperature
Hold Hold
T
stg, min
time time
One cycle period
IEC  633/04
Figure 4 – Configuration of one cycle period

---------------------- Page: 16 ----------------------

62137 © IEC:2005 – 25 –
Table 1 – Temperature cycling test conditions
Step Test condition A Test condition B Test condition C Test condition D
Minimum storage
T ± 5
–25 ± 5 –40 ± 5 –30 ± 5
op min
temperature: T °C
stg min
Maximum storage
T ± 5
125 ± 5 125 ± 5 80 ± 5
op max
temperature: T °C
stg max
At least At least At least At least
Hold time
7 min 7 min 7 min 7 min
NOTE T is the minimum operating temperature.
op min
T is the maximum operating temperature.
op max
The hold time starts when the temperature of the specimen reaches the specified value.
7.1.4.4 Test
Place the specimen in the oven where the best airflow is obtained and where there is
sufficient airflow around the specimen. It is recommended that the electrical resistance of the
specimen be measured at maximum and minimum storage temperatures continuously during
the test.
7.1.4.5 Post-treatment
After the test has been completed, leave the specimen under the standard condition for the
time specified in the individual standard:
• standard temperature range: 15 °C to 35 °C;
• standard relative humidity: 25 % to 75 %;
• standard atmospheric pressure: 86 kPa to 106 kPa.
Refer to IEC 60068-1.
7.1.4.6 Evaluation
The final measurement shall be carried out for the items, under the conditions specified in the
individual standard.
7.1.5 Conditions to be specified in the individual standard
a) Items and conditions of initial measurement (see 7.1.4.1).
b) Specification of mount quality test board (when not specified) (see Clause A.4).
c) Mount conditions (when not specified) (see Annex B).
d) Pre-treatment conditions (when necessary) (see 7.1.4.2).
e) Moistening process conditions (see 7.1.4.2).
f) Test condi
...