ASTM F1192-11(2018)
(Guide)Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
SIGNIFICANCE AND USE
5.1 Many modern integrated circuits, power transistors, and other devices experience SEP when exposed to cosmic rays in interplanetary space, in satellite orbits or during a short passage through trapped radiation belts. It is essential to be able to predict the SEP rate for a specific environment in order to establish proper techniques to counter the effects of such upsets in proposed systems. As the technology moves toward higher density ICs, the problem is likely to become even more acute.
5.2 This guide is intended to assist experimenters in performing ground tests to yield data enabling SEP predictions to be made.
SCOPE
1.1 This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z ≥ 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via another mechanism. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor, (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read only memory, (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750.
1.2 The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, and solar flares. The techniques do not, however, simulate heavy ion beam effects proposed for military programs. The end product of the test is a plot of the SEP cross section (the number of upsets per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with the system's heavy ion environment to estimate a system upset rate.
1.3 Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered.
1.4 The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard.
1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use.
1.6 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
General Information
- Status
- Published
- Publication Date
- 28-Feb-2018
- Technical Committee
- E10 - Nuclear Technology and Applications
Overview
ASTM F1192-11(2018), titled Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices, provides comprehensive procedures and requirements for testing integrated circuits and semiconductor devices for single event phenomena (SEP) using heavy ion irradiation. Developed by ASTM, this international standard helps experimenters perform ground tests to predict SEP rates, which is essential for reliable device operation in environments with high radiation exposure such as outer space, satellite orbits, or interplanetary missions. The guide specifically addresses the effects of heavy ions (atomic number Z ≥ 2) and excludes events caused by protons or neutrons.
Key Topics
- Single Event Phenomena (SEP): Covers manifestations such as soft and hard errors, latchup, single event upsets (SEU), single event gate rupture (SEGR), and burnout (SEB) that result from a single ion strike.
- Testing Procedures: Describes how to irradiate devices with heavy ions of known energy and flux, and how to detect and classify upsets or permanent damage.
- Data Output: Defines the measurement of SEP cross section (the number of upsets per unit fluence) as a function of linear energy transfer (LET).
- Test Conditions: Outlines the necessity to record beam characteristics, device operating conditions, test board configuration, and upset detection methodology to ensure repeatability and validity.
- Device Preparation: Details critical steps such as removal of device lids for beam access, handling of plastic and ceramic packages, and pre-test checks to verify device functionality.
- Dosimetry and Instrumentation: Emphasizes accurate measurement of ion flux, fluence, beam uniformity, and energy-key for quantitative and reproducible results.
Applications
ASTM F1192-11(2018) serves significant practical purposes for organizations designing and deploying electronic systems in radiation-prone environments:
- Aerospace and Satellite Systems: Ensures the reliability of integrated circuits and power transistors exposed to cosmic rays, trapped ions, and solar flares during space missions.
- Semiconductor Device Development: Provides device manufacturers a framework to characterize SEP susceptibility, especially vital as technologies move towards higher density and smaller geometry.
- Radiation Hardness Assurance: Supports system designers in predicting and mitigating the risk of single event upsets in mission-critical applications.
- Standardized Testing: Allows for consistent ground testing and data comparison between different laboratories, streamlining certification processes for components intended for high-radiation deployment.
Related Standards
- MIL-STD-750 Method 1080: Referenced for power transistor testing under similar heavy ion irradiation conditions.
- ASTM E10 Standards: Governs the general radiation dosimetry for effects on materials and devices.
- Upcoming Guides: A separate standard is anticipated for proton-induced SEP, as these are not covered under ASTM F1192-11(2018).
Practical Value
Implementing ASTM F1192-11(2018) enables engineers and testing laboratories to:
- Accurately assess the vulnerability of electronic components to heavy-ion-induced SEEs using standardized protocols.
- Predict in-orbit failure rates and strategize design-level mitigations such as error correction or device selection.
- Provide traceable evidence of device performance in compliance with recognized international practices and regulatory frameworks, supporting both government and commercial space qualification.
Keywords: ASTM F1192-11, single event phenomena, SEP, heavy ion irradiation, semiconductor device testing, space radiation effects, SEU, latchup, cross section measurement, linear energy transfer (LET), electronics reliability.
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ASTM F1192-11(2018) - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices
Frequently Asked Questions
ASTM F1192-11(2018) is a guide published by ASTM International. Its full title is "Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices". This standard covers: SIGNIFICANCE AND USE 5.1 Many modern integrated circuits, power transistors, and other devices experience SEP when exposed to cosmic rays in interplanetary space, in satellite orbits or during a short passage through trapped radiation belts. It is essential to be able to predict the SEP rate for a specific environment in order to establish proper techniques to counter the effects of such upsets in proposed systems. As the technology moves toward higher density ICs, the problem is likely to become even more acute. 5.2 This guide is intended to assist experimenters in performing ground tests to yield data enabling SEP predictions to be made. SCOPE 1.1 This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z ≥ 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via another mechanism. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor, (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read only memory, (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750. 1.2 The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, and solar flares. The techniques do not, however, simulate heavy ion beam effects proposed for military programs. The end product of the test is a plot of the SEP cross section (the number of upsets per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with the system's heavy ion environment to estimate a system upset rate. 1.3 Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered. 1.4 The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard. 1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use. 1.6 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
SIGNIFICANCE AND USE 5.1 Many modern integrated circuits, power transistors, and other devices experience SEP when exposed to cosmic rays in interplanetary space, in satellite orbits or during a short passage through trapped radiation belts. It is essential to be able to predict the SEP rate for a specific environment in order to establish proper techniques to counter the effects of such upsets in proposed systems. As the technology moves toward higher density ICs, the problem is likely to become even more acute. 5.2 This guide is intended to assist experimenters in performing ground tests to yield data enabling SEP predictions to be made. SCOPE 1.1 This guide defines the requirements and procedures for testing integrated circuits and other devices for the effects of single event phenomena (SEP) induced by irradiation with heavy ions having an atomic number Z ≥ 2. This description specifically excludes the effects of neutrons, protons, and other lighter particles that may induce SEP via another mechanism. SEP includes any manifestation of upset induced by a single ion strike, including soft errors (one or more simultaneous reversible bit flips), hard errors (irreversible bit flips), latchup (persistent high conducting state), transients induced in combinatorial devices which may introduce a soft error in nearby circuits, power field effect transistor (FET) burn-out and gate rupture. This test may be considered to be destructive because it often involves the removal of device lids prior to irradiation. Bit flips are usually associated with digital devices and latchup is usually confined to bulk complementary metal oxide semiconductor, (CMOS) devices, but heavy ion induced SEP is also observed in combinatorial logic programmable read only memory, (PROMs), and certain linear devices that may respond to a heavy ion induced charge transient. Power transistors may be tested by the procedure called out in Method 1080 of MIL STD 750. 1.2 The procedures described here can be used to simulate and predict SEP arising from the natural space environment, including galactic cosmic rays, planetary trapped ions, and solar flares. The techniques do not, however, simulate heavy ion beam effects proposed for military programs. The end product of the test is a plot of the SEP cross section (the number of upsets per unit fluence) as a function of ion LET (linear energy transfer or ionization deposited along the ion's path through the semiconductor). This data can be combined with the system's heavy ion environment to estimate a system upset rate. 1.3 Although protons can cause SEP, they are not included in this guide. A separate guide addressing proton induced SEP is being considered. 1.4 The values stated in SI units are to be regarded as standard. No other units of measurement are included in this standard. 1.5 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety, health, and environmental practices and determine the applicability of regulatory limitations prior to use. 1.6 This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
ASTM F1192-11(2018) is classified under the following ICS (International Classification for Standards) categories: 31.080.01 - Semiconductor devices in general. The ICS classification helps identify the subject area and facilitates finding related standards.
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Standards Content (Sample)
This international standard was developed in accordance with internationally recognized principles on standardization established in the Decision on Principles for the
Development of International Standards, Guides and Recommendations issued by the World Trade Organization Technical Barriers to Trade (TBT) Committee.
Designation: F1192 − 11 (Reapproved 2018)
Standard Guide for the
Measurement of Single Event Phenomena (SEP) Induced by
Heavy Ion Irradiation of Semiconductor Devices
This standard is issued under the fixed designation F1192; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (´) indicates an editorial change since the last revision or reapproval.
This standard has been approved for use by agencies of the U.S. Department of Defense.
1. Scope 1.3 Although protons can cause SEP, they are not included
in this guide. A separate guide addressing proton induced SEP
1.1 This guide defines the requirements and procedures for
is being considered.
testing integrated circuits and other devices for the effects of
single event phenomena (SEP) induced by irradiation with 1.4 The values stated in SI units are to be regarded as
heavy ions having an atomic number Z ≥ 2. This description standard. No other units of measurement are included in this
specifically excludes the effects of neutrons, protons, and other standard.
lighter particles that may induce SEP via another mechanism.
1.5 This standard does not purport to address all of the
SEP includes any manifestation of upset induced by a single
safety concerns, if any, associated with its use. It is the
ion strike, including soft errors (one or more simultaneous
responsibility of the user of this standard to establish appro-
reversible bit flips), hard errors (irreversible bit flips), latchup
priate safety, health, and environmental practices and deter-
(persistent high conducting state), transients induced in com-
mine the applicability of regulatory limitations prior to use.
binatorial devices which may introduce a soft error in nearby
1.6 This international standard was developed in accor-
circuits, power field effect transistor (FET) burn-out and gate
dance with internationally recognized principles on standard-
rupture. This test may be considered to be destructive because
ization established in the Decision on Principles for the
it often involves the removal of device lids prior to irradiation.
Development of International Standards, Guides and Recom-
Bit flips are usually associated with digital devices and latchup
mendations issued by the World Trade Organization Technical
is usually confined to bulk complementary metal oxide
Barriers to Trade (TBT) Committee.
semiconductor, (CMOS) devices, but heavy ion induced SEP is
2. Referenced Documents
also observed in combinatorial logic programmable read only
memory, (PROMs), and certain linear devices that may re-
2.1 Military Standard:
spond to a heavy ion induced charge transient. Power transis-
750 Method 1080
tors may be tested by the procedure called out in Method 1080
of MIL STD 750. 3. Terminology
1.2 The procedures described here can be used to simulate 3.1 Definitions of Terms Specific to This Standard:
and predict SEP arising from the natural space environment, 3.1.1 DUT—device under test.
including galactic cosmic rays, planetary trapped ions, and
3.1.2 fluence—the flux integrated over time, expressed as
solar flares. The techniques do not, however, simulate heavy
ions/cm .
ion beam effects proposed for military programs. The end
3.1.3 flux—the number of ions/s passing through a one cm
product of the test is a plot of the SEP cross section (the
area perpendicular to the beam (ions/cm -s).
number of upsets per unit fluence) as a function of ion LET
3.1.4 LET—the linear energy transfer, also known as the
(linear energy transfer or ionization deposited along the ion’s
stopping power dE/dx, is the amount of energy deposited per
path through the semiconductor). This data can be combined
unit length along the path of the incident ion, typically
with the system’s heavy ion environment to estimate a system
normalized by the target density and expressed as MeV-cm /
upset rate.
mg.
3.1.4.1 Discussion—LET values are obtained by dividing
1 the energy per unit track length by the density of the irradiated
This guide is under the jurisdiction of ASTM Committee E10 on Nuclear
Technology and Applications and is the direct responsibility of Subcommittee medium. Since the energy lost along the track generates
E10.07 on Radiation Dosimetry for Radiation Effects on Materials and Devices.
Current edition approved March 1, 2018. Published April 2018. Originally
approved in 1988. Last previous edition approved in 2011 as F1192–11. DOI: Available from Standardization Documents Order Desk, Bldg. 4, Section D,
10.1520/F1192-11R18. 700 Robbins Ave., Philadelphia, PA 19111–5094.
Copyright © ASTM International, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959. United States
F1192 − 11 (2018)
electron-hole pairs, one can also express LET as charge energetic particle. This term would also include effects induced
deposited per unit path length (for example, picocoulombs/ by neutrons and protons, as well as the response of power
micron) if it is known how much energy is required to generate transistors—categories not included in this guide.
an electron-hole pair in the irradiated material. (For silicon,
3.1.12 single event transients, (SET)—SET’s are SE-caused
3.62 eV is required per electron-hole pair.)
electrical transients that are propagated to the outputs of
A correction, important for lower energy ions in particular, is
combinational logic IC’s. Depending upon system application
made to allow for the loss of ion energy after it has penetrated
of these combinational logic IC’s, SET’s can cause system
overlayers above the device sensitive volume. Thus the ion’s
SEU.
energy, E, at the sensitive volume is related to its initial energy,
3.1.13 single event upset, (SEU)—comprise soft upsets and
E , as:
O
hard faults.
~t/cosθ!
dE x
~ !
3.1.14 soft upset—the change of state of a single latched
E 5 E 2 dx
* S D
s o
dx
o logic state from one to zero, or vice versa. The upset is “soft”
if the latch can be rewritten and behave normally thereafter.
where t is the thickness of the overlayer and θ is the angle
3.1.15 threshold LET—for a given device, the threshold
of the incident beam with respect to the surface normal. The
LET is defined as the minimum LET that a particle must have
appropriate LET would thus correspond to the modified
to cause a SEU at θ = 0 for a specified fluence (for example,
energy, E.
6 2
10 ions/cm ). In some of the literature, the threshold LET is
A very important concept, but one which is by no means
also sometimes defined as that LET value where the cross
universally true, is the effective LET. The effective LET ap-
section is some fraction of the “limiting” cross section, but this
plies for those soft error mechanisms where the device sus-
definition is not endorsed herein.
ceptibility depends, in reality, on the charge deposited within
a sensitive volume that is thin like a wafer. By equating the
3.1.16 SEP cross section—is a derived quantity equal to the
charge deposited at normal incidence to that deposited by an
number of SEP events per unit fluence.
ion with incident angle θ, we obtain:
3.1.16.1 Discussion—For those situations that meet the
criteria described for usage of an effective LET (see 3.1.4), the
LET effective 5 LET normal /cosθ θ,60°
~ ! ~ !
SEP cross section can be extended to include beams impinging
Because of this relationship, one can sometimes test with
at an oblique angle as follows:
a single ion at two different angles to correspond to two dif-
number of upsets
ferent (effective) LETs. Note that the effective LET at high
σ 5
fluence × cos θ
angles may not be a realistic measure (see also 6.6). Note
also that the above relationship breaks down when the lateral
where θ = angle of the beam with respect to the perpen-
dimensions of the sensitive volume are comparable to its
dicularity to the chip. The cross section may have units such
2 2 2
depth, as is the case with VLSI and other modern high den-
as cm /device or cm /bit or μm /bit. In the limit of high
sity ICs.
LET (which depends on the particular device), the SEP cross
3.1.5 single event burnout—SEB (also known as SEBO) section will have an area equal to the sensitive area of the
may occur as a result of a single ion strike. Here a power device (with the boundaries extended to allow for possible
transistor sustains a high drain-source current condition, which diffusion of charge from an adjacent ion strike). If any ion
usually culminates in device destruction. causes multiple upsets per strike, the SEP cross section will
be proportionally higher. If the thin region waferlike assump-
3.1.6 single event effects—SEE is a term used earlier to
tion for the shape of the sensitive volume does not apply,
describe many of the effects now included in the term SEP.
then the SEP cross section data become a complicated func-
3.1.7 single event gate rupture—SEGR (also known as
tion of incident ion angle. As a general rule, high angle tests
SEGD) may occur as a result of a single ion strike. Here a
are to be avoided when a normal incident ion of the same
power transistor sustains a high gate current as a result of
LET is available.
damage of the gate oxide.
A limiting or asymptotic cross section is sometimes mea-
3.1.8 single event functionality interrupt—SEFI may occur
sured at high LET whenever all particles impinging on a
as a result of a single ion striking a special device node, used
sensitive area of the device cause upset. One can establish
for an electrical functionality test.
this value if two measurements, having a different high LET,
exhibit the same cross sections.
3.1.9 single event hard fault—often called hard error, is a
permanent, unalterable change of state that is typically associ-
3.2 Abbreviations:
ated with permanent damage to one or more of the materials
3.2.1 ALS—advanced low power Schottky.
comprising the affected device.
3.2.2 CMOS—complementary metal oxide semiconductor
3.1.10 single event latchup—SEL is an abnormal low
device.
impedance, high-current density state induced in an integrated
3.2.3 FET—field effect transistor.
circuit that embodies a parasitic pnpn structure operating as a
silicon controlled rectifier. 3.2.4 IC—integrated circuit.
3.1.11 single event phenomena—SEP is the broad category 3.2.5 NMOS—n-type-channel metal oxide semiconductor
of all semiconductor device responses to a single hit from an device.
F1192 − 11 (2018)
3.2.6 PMOS—p-type-channel metal oxide semiconductor provide proper dosimetry and ensure the absence of collective
device. effects on device response. For heavy ion SEP tests a normal
2 5 2
flux range will be 10 to 10 ions ⁄cm -s. However, higher
3.2.7 PROM—programmable read only memory.
fluxes are acceptable if it can be established that dosimetry and
3.2.8 RAM—random access memory.
tester limits, coincident upset effects, device heating, and the
3.2.9 VLSI—very large scale integrated circuit.
like, are properly accounted for. Such higher limits may be
needed for testing future smaller geometry parts.
4. Summary of Guide
4.4.8 Particle Fluence Levels—The minimum fluence is that
4.1 The SEP test consists of irradiation of a device with a
fluence required to establish that an observance of no upsets
prescribed heavy ion beam of known energy and flux in such a
corresponds to an acceptable upper bound on the upset cross
way that the number of single event upsets or other phenomena
section with a given confidence. Sufficient fluence should be
can be detected as a function of the beam fluence (particles/
provided to also ensure that the measured number of upset
cm ). For the case where latchup is observed, a series of
events provides an upset cross section whose magnitude lies
measurements is required in which the fluence is recorded at
within acceptable error limits (see 8.2.7.2). In practice, a
7 2
which latchup occurs, in order to obtain an average fluence.
fluence of 10 ions/cm will often meet these requirements.
4.4.9 Accumulated Total Dose—The total accumulated dose
4.2 The beam LET, equivalent to the ion’s stopping power,
shall be recorded for each device. However, it should be noted
dE/dx, (energy/distance), is a fundamental measurement vari-
that the average dose actually represents a few heavy ion
able. A full device characterization requires irradiation with
tracks, <10 nm in diameter, in each charge collection region, so
beams of several different LETs that in turn requires changing
this dose may affect the device physics differently than a
the ion species, energy, or, in some cases, angle of incidence
uniform (for example, gamma) dose deposition. In particular, it
with respect to the chip surface.
is sometimes observed that accumulated dose delivered by
4.3 The final useful end product is a plot of the upset rate or
heavy ions is less damaging than that delivered with uniform
cross section as a function of the beam LET or, equivalently, a
dose deposition.
plot of the average fluence to cause upset as a function of beam
4.4.10 Range of Ions—The range or penetration depth of the
LET. These comments presume that LET, independent of Z, is
energetic ions is an important consideration. An adequate range
a determinant of SE vulnerability. In cases where charge
is especially crucial in detecting latchup, because the relevant
density (or charge density and total charge) per unit distance
junction is often buried deep below the active chip. Some test
determine device response to SEs, results provided solely in
requirements specify an ion range of >30 μm. The U.C.
terms of LET may be incomplete or inaccurate, or both.
Berkeley 88-inch cyclotron and the Brookhaven National
4.4 Test Conditions and Restrictions—Because many fac-
Laboratory Van de Graaff have adequate energy for most ions,
tors enter into the effects of radiation on the device, parties to
but not all. Gold data at BNL is frequently too limited in range
the test should establish and record the test conditions to ensure
to give consistent results when compared to nearby ions of the
test validity and to facilitate comparison with data obtained by
periodic table. Medium-energy sources, such as the K500
other experimenters testing the same type of device. Important
cyclotron at Texas A & M, easily satisfy all range requirements.
factors which must be considered are:
High-energy machines that simulate cosmic ray energies, such
4.4.1 Device Appraisal—A review of existing device data to
as GANIL (Caen, France) and the cyclotron at Darmstadt,
establish basic test procedures and limits (see 8.1),
Germany, provide greater range.
4.4.2 Radiation Source—The type and characteristics of the
5. Significance and Use
heavy ion source to be used (see 7.1),
4.4.3 Operating Conditions—The description of the testing
5.1 Many modern integrated circuits, power transistors, and
procedure, electrical biases, input vectors, temperature range,
other devices experience SEP when exposed to cosmic rays in
current-limiting conditions, clocking rates, reset conditions,
interplanetary space, in satellite orbits or during a short passage
etc., must be established (see Sections 6, 7, and 8),
through trapped radiation belts. It is essential to be able to
4.4.4 Experimental Set-Up—The physical arrangement of
predict the SEP rate for a specific environment in order to
the accelerator beam, dosimetry electronics, test device,
establish proper techniques to counter the effects of such upsets
vacuum chamber, cabling and any other mechanical or electri-
in proposed systems. As the technology moves toward higher
cal elements of the test (see Section 7),
density ICs, the problem is likely to become even more acute.
4.4.5 Upset Detection—The basis for establishing upset
5.2 This guide is intended to assist experimenters in per-
must be defined (for example, by comparison of the test device
forming ground tests to yield data enabling SEP predictions to
response with some reference states, or by comparison of
be made.
post-irradiation bit patterns with the pre-irradiation pattern, and
the like (see 7.4)). Tests of heavy ion induced transients require
6. Interferences
special techniques whose extent depends on the objectives and
6.1 There are several factors which need to be considered in
resources of the experimenter,
accommodating interferences affecting the test. Each is de-
4.4.6 Dosimetry—The techniques to be used to measure ion
scribed herein.
beam fluxes and fluence.
4.4.7 Flux Range—The range of heavy ion fluxes (both 6.2 Ion Beam Pile-up—When an accelerator is being chosen
average and instantaneous) must be established in order to to perform a SEP test, the machine duty cycle needs to be
F1192 − 11 (2018)
considered. In general, the instantaneous pulsed flux arriving at 6.7.3 As geometries continue to scale down, the possibility
the DUT or scintillation is higher than the average measured of multiple bit upsets increases. Hence, the nature of the ion’s
flux, and the increase is given by the inverse of the duty cycle. radial energy deposition becomes more important and it
A calculation should be made to ensure that no more than one becomes more likely that two different ions of equivalent LET
particle is depositing charge in the DUT or scintillator at the do not in fact have an equal SEP effect. In addition, the effects
same time. (The time span defining the “same time” is of irradiating at an angle become much more complex when an
determined by the rate at which DUT elements are reset or at ion track overlaps two cells. The frequency of such overlap-
which the scintillator saturates.) ping upsets likewise depends on the track’s radial energy
deposition. Use of ions having adequate range is also impor-
6.3 Radiation Damage:
tant. Lower energy heavy ions lose LET as they slow down by
6.3.1 A history of previous total dose irradiations for the
attaching electrons and also show a contraction in the width of
DUTs must be known to assist in the determination of whether
the radial energy deposition.
prior total ionizing dose has affected the SEP response.
6.3.2 During a test, the usual fluence for heavy ion tests
6 7 2 7. Apparatus and Radiation Sources
(10 to 10 ions/cm ) corresponds to kilorad dose levels in
the parts. Total dose accumulated during the test shall be 7.1 Particle Radiation Sources—The choice of radiation
recorded, because the radiation effects of the accumulated dose
sources is important. Hence source selection guidelines are
may alter the SEP effect being monitored. given here. A test covering the full range of LET values (both
high and low Z ions) will require an accelerator. Cost,
6.3.3 Sustained tests over a long period of time may lead to
permanent degradation of electronics components, computers, availability, lead times, and ion/energy capabilities are all
important considerations in selecting a facility for a given test.
sockets, etc. Fixtures must be checked regularly for signs of
radiation damage, such as high leakage currents. Three source types are commonly used for conducting SEP
experiments, each of which has specific advantages and disad-
6.4 Temperature—Latchup susceptibility and soft error
vantages (see 8.1).
cross sections increase with temperature. In addition there are
7.1.1 The three source types used for heavy ion SEP
special situations in which SEP susceptibility will be particu-
measurement are as follows:
larly sensitive to temperature (for example, from the tempera-
7.1.1.1 Cyclotrons—Cyclotrons provide the greatest flex-
ture dependence of feedback resistors).
ibility of test options because they can supply a number of
6.5 Electrical Noise:
different ions (including alpha particles) at a finite number of
6.5.1 Generalized Noise—Because of the amount of electri-
different energies. The maximum available ion energy of the
cal noise present in the vicinity of an accelerator, careful noise
heavy ion machines is usually greater than the energy (2
reduction techniques are mandatory. Cable lengths should be as
MeV/nucleon) corresponding to the maximum LET. Hence, the
short as possible, consistent with constraints imposed by the
ions can be selected to have adequate penetration (range) in the
accelerator facility lay-out.
device.
6.5.2 The tester must interact with accelerator personnel to
7.1.1.2 Van de Graaff Accelerators —These accelerators
ensure that the accelerator power supply is free of on-line
have the important advantage of being able to pinpoint low
instabilities that may affect the alignment and uniformity of the
LET thresholds of sensitive devices where lower energy, lower
beam.
Z ions of continuously variable energies are desirable. These
6.6 Background Radiation—Radioactivity induced by the machines also offer a rapid change of ion species and are
somewhat less expensive to operate than cyclotrons. However,
heavy ion tests is minimal. The tester should perform radioac-
tivity checks of the DUT board and parts after sustained runs; because van de Graaff machines have limited energy, it may
however, in general, DUTs may be safely packed and trans- not be possible to obtain higher Z particles having an adequate
ported without delay after test. range in some machines.
7.1.1.3 Alpha Emitters—Naturally occurring radioactive al-
6.7 Ion Interaction Effects:
pha emitters provide a limited source for screening parts that
6.7.1 The calculation of an effective LET (see discussion in
are very sensitive to SEU. Some alpha emitters (for example,
3.1.4) hinges on the thin slab approximation of the sensitive
americium) emit particles with a single energy so that they can
volume, which is less likely to hold for high density, small
be used for establishing a precise LET threshold (of the order
geometry devices. This problem can be examined by investi-
of <1 MeV/(mg/cm )).
gating the device SEP response to two different ions having the
same effective LET. 7.2 Test Instrumentation—The test instrumentation can be
6.7.2 The proportion of length to width of the sensitive divided into two categories: (1) Beam delivery, characteriza-
volume is also assumed equal to one. Rotating the device along tion and dosimetry, and (2) Device tester (input stimulus
both axes of symmetry during the test may provide a more generator and response recorder) designed to accommodate the
meaningful characterization. specified devices. The details of item (1) above are spelled out
F1192 − 11 (2018)
in 7.5.4, 7.5.5 and 7.5.6. The details of item (2) cannot be 7.4.3.4 Real-time diagnostic data display capability. Man-
spelled out, but test philosophy and logic is sketched in 7.4. For datory for immediate detection of anomalous test conditions
information on various test instrumentation systems refer to and data.
Nichols. 7.4.3.5 Capability for some data reduction while tests are in
progress. Desirable for optimization of test procedures while
7.3 Test Boards—The DUTs will be placed on a board, often
data are being acquired.
within a vacuum chamber, during the test. To reduce the
7.4.4 In summary, a tester will usually be of the computer-
number of vacuum pump downs that will be required, it is
dominated or computer-assisted type. It should be program-
highly desirable to include sockets in the boards for several
mable to accommodate a variety of device types with a
devices. The board must be remotely positionable to change
minimum need for new, specialized hardware interfaces and
from one DUT under test to another, and rotatable to permit the
minimum time required for reprogramming. The tester design
beam to strike the DUT at oblique angles. Tester-to-DUT card
should be sufficiently flexible to meet the changing require-
cabling should be made compatible, if needed, with the
ments of new device technologies. Finally, the experimenter
vacuum chamber bulkhead connectors to facilitate checkout
must understand the extent to which the device is being tested
prior to chamber installation.
(its fault coverage) in order to arrive at a quantitative result. He
7.4 DUT Tester:
must know what fraction of the time the device is in a
7.4.1 There are many ways to design a tester/counter to
SEP-susceptible mode and also what fraction of the chip’s
measure soft errors, with special features best suited to a
susceptible elements are omitted from testing altogether. Com-
specified test application. However, there are certain general
plex devices do not always permit easy testing access. In such
desirable features which any tester design should incorporate,
cases, a thorough understanding of the untested elements must
and these will be addressed briefly.
be obtained to permit extrapolation from data obtained by the
7.4.2 Except in the simplest of special cases where a test.
dedicated hardware tester is most desirable, the tests are
7.5 Typical Cyclotron Test Set-Up:
performed by a computer, which exercises the DUTs directly,
7.5.1 Schematic—A schematic overview of a typical SEP
or alternatively makes use of an auxiliary “exerciser” or pattern
test set-up is provided in Fig. 1. The essential features are a
operator. A tester whose design is based on the first approach,
collimated, spatially uniform beam of particles entering a
can be said to be “Computer Dominated,” while the second
va
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