ASTM F1392-02

Standard Test Method for Determining Net Carrier Density Profiles in Silicon Wafers by Capacitance-Voltage Measurements With a Mercury Probe (Withdrawn 2003)

SCOPE
This standard was transferred to SEMI (www.semi.org) May 2003
1.1 This test method covers the measurement of net carrier density and net carrier density profiles in epitaxial and polished bulk silicon wafers in the range from about 4 x 10 13 to about 8 x 1016 carriers/cm 3 (resistivity range from about 0.1 to about 100 Ω·cm in n-type wafers and from about 0.24 to about 330 Ω·cm in p-type wafers).
1.2 This test method requires the formation of a Schottky barrier diode with a mercury probe contact to an epitaxial or polished wafer surface. Chemical treatment of the silicon surface may be required to produce a reliable Schottky barrier diode (1). The surface treatment chemistries are different for n- and p-type wafers. This test method is sometimes considered destructive due to the possibility of contamination from the Schottky contact formed on the wafer surface; however, repetitive measurements may be made on the same test specimen.
1.3 This test method may be applied to epitaxial layers on the same or opposite conductivity type substrate. This test method includes descriptions of fixtures for measuring substrates with or without an insulating backseal layer.
1.4 The depth of the region that can be profiled depends on the doping level in the test specimen. Based on data reported by Severin (1) and Grove (2), Fig. 1 shows the relationships between depletion depth, dopant density, and applied voltage together with the breakdown voltage of a mercury silicon contact. The test specimen can be profiled from approximately the depletion depth corresponding to an applied voltage of 1 V to the depletion depth corresponding to the maximum applied voltage (200 V or about 80 % of the breakdown voltage, whichever is lower). To be measured by this test method, a layer must be thicker than the depletion depth corresponding to an applied voltage of 2 V.
1.5 This test method is intended for rapid carrier density determination when extended sample preparation time or high temperature processing of the wafer is not practical.
1.6 This test method provides for determining the effective area of the mercury probe contact using polished bulk reference wafers that have been measured for resistivity at 23°C in accordance with Test Method F 84 (Note 1). This test method also includes procedures for calibration of the apparatus for measuring both capacitance and voltage.
Note 1—An alternative method of determining the effective area of the mercury probe contact that involves the use of reference wafers whose net carrier density has been measured using fabricated mesa or planar  p-n junction diodes or evaporated Schottky diodes is not included in this test method but may be used if agreed upon by the parties to the test.
1.7 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use. Specific hazard statements are given in 7.1, (7.2, 7.10.3 (Note 6) 8.2, 11.5.1, 11.6.3, and 11.6.5.

General Information

• Status: Withdrawn
• Publication Date: 09-Dec-2002
• Withdrawal Date: 09-May-2003
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaces: ASTM F1392-00 - Standard Test Method for Determining Net Carrier Density Profiles in Silicon Wafers by Capacitance-Voltage Measurements With a Mercury Probe
• Effective Date: 10-Dec-2002

Standards Content (Sample)

NOTICE: This standard has either been superceded and replaced by a new version or discontinued.
Contact ASTM International (www.astm.org) for the latest information.
Designation: F 1392 – 02
Standard Test Method for
Determining Net Carrier Density Profiles in Silicon Wafers
by Capacitance-Voltage Measurements With a Mercury
1
Probe
This standard is issued under the fixed designation F 1392; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope voltage (200 V or about 80 % of the breakdown voltage,
2
whichever is lower). To be measured by this test method, a
1.1 This test method covers the measurement of net carrier
layer must be thicker than the depletion depth corresponding to
density and net carrier density profiles in epitaxial and polished
13
an applied voltage of 2 V.
bulk silicon wafers in the range from about 4 3 10 to about
16 3
1.5 This test method is intended for rapid carrier density
8 3 10 carriers/cm (resistivity range from about 0.1 to
determination when extended sample preparation time or high
about 100 V·cm in n-type wafers and from about 0.24 to about
temperature processing of the wafer is not practical.
330 V·cm in p-type wafers).
1.6 This test method provides for determining the effective
1.2 This test method requires the formation of a Schottky
area of the mercury probe contact using polished bulk refer-
barrier diode with a mercury probe contact to an epitaxial or
ence wafers that have been measured for resistivity at 23°C in
polished wafer surface. Chemical treatment of the silicon
accordance with Test Method F 84 (Note 1). This test method
surface may be required to produce a reliable Schottky barrier
3
also includes procedures for calibration of the apparatus for
diode (1). The surface treatment chemistries are different for
measuring both capacitance and voltage.
n- and p-type wafers. This test method is sometimes considered
destructive due to the possibility of contamination from the
NOTE 1—An alternative method of determining the effective area of the
Schottky contact formed on the wafer surface; however,
mercury probe contact that involves the use of reference wafers whose net
carrier density has been measured using fabricated mesa or planar p-n
repetitive measurements may be made on the same test
junction diodes or evaporated Schottky diodes is not included in this test
specimen.
method but may be used if agreed upon by the parties to the test.
1.3 This test method may be applied to epitaxial layers on
the same or opposite conductivity type substrate. This test 1.7 This standard does not purport to address all of the
safety concerns, if any, associated with its use. It is the
method includes descriptions of fixtures for measuring sub-
strates with or without an insulating backseal layer. responsibility of the user of this standard to establish appro-
priate safety and health practices and determine the applica-
1.4 The depth of the region that can be profiled depends on
the doping level in the test specimen. Based on data reported bility of regulatory limitations prior to use. Specific hazard
statements are given in 7.1, ( 7.2, 7.10.3 (Note 6), 8.2, 11.5.1,
by Severin (1) and Grove (2), Fig. 1 shows the relationships
between depletion depth, dopant density, and applied voltage 11.6.3, and 11.6.5.
together with the breakdown voltage of a mercury silicon
2. Referenced Documents
contact. The test specimen can be profiled from approximately
2.1 ASTM Standards:
the depletion depth corresponding to an applied voltage of 1 V
D 5127 Guide for Ultra Pure Water Used in the Electronics
to the depletion depth corresponding to the maximum applied
4
and Semiconductor Industry
D 4356 Practice for Establishing Consistent Test Method
5
Tolerances
1
This test method is under the jurisdiction of ASTM Committee F01 on
E 691 Practice for Conducting an Interlaboratory Study to
Electronics and is the direct responsibility of Subcommittee F01.06 on Silicon
5
Determine the Precision of a Test Method
Materials and Process Control.
F 26 Test Methods for Determining the Orientation of a
Current edition approved Dec. 10, 2002. Published February 2003. Originally
6
approved in 1992. Last previous edition approved in 2002 as F 1392 – 00.
Semiconductive Single Crystal
2
DIN 50439, Determination of the Dopant Concentration Profile of a Single
F 42 Test Methods for Conductivity Type of Extrinsic
Crystal Semiconductor Material by Means of the Capacitance-Voltage Method and
Mercury Contact, is technically equivalent to this test method. DIN 50439 is the
responsibility of DIN Committee NMP 221, with which Committee F-1 maintains
close liaison. DIN 50439 is available from Beuth Verlag GmbH, Burggrafenstraße
4
4-10, D-1000, Berlin 30, Germany. Annual Book of ASTM Stand
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