IEC TR 62240-2:2018

Process management for avionics - Electronic components capability in operation - Part 2: Semiconductor microcircuit lifetime

IEC TR 62240-2:2018(E) describes a process and a method for selecting digital semiconductor microcircuits by ensuring that their lifetime is compatible with the requirements of aerospace, defence and high performance (ADHP) applications (generally in connection with functional environments). Methods and guidelines are provided to assess the long term reliability of COTS semiconductor microcircuits in such applications; they mainly apply during the electronic design phase when selecting semiconductor microcircuits and assessing the application reliability. focuses on original equipment manufacturers (OEMs) using commercial off the shelf (COTS) semiconductor microcircuits for high performance, high reliability and long duration applications. This document supports OEMs in the preparation and maintenance of their semiconductor electronic component management plan (ECMP).

General Information

• Status: Published
• Publication Date: 17-Jun-2018
• ICS: 03.100.50 - Production. Production management
• ICS: 31.020 - Electronic components in general
• ICS: 49.060 - Aerospace electric equipment and systems
• Technical Committee: TC 107 - Process management for avionics
• Current Stage: PPUB - Publication issued
• Start Date: 04-Jul-2018
• Completion Date: 18-Jun-2018

Standards Content (Sample)

IEC TR 62240-2 ®
Edition 1.0 2018-06
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in
operation –
Part 2: Semiconductor microcircuit lifetime

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IEC TR 62240-2 ®
Edition 1.0 2018-06
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in

operation –
Part 2: Semiconductor microcircuit lifetime

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 03.100.50; 31.020; 49.060 ISBN 978-2-8322-5769-2

– 2 – IEC TR 62240-2:2018 © IEC 2018
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms, definitions and abbreviated terms . 7
3.1 Terms and definitions . 7
3.2 Abbreviated terms . 10
4 Lifetime assessment process and method. 11
4.1 General . 11
4.2 Input data for the method . 13
4.2.1 General . 13
4.2.2 COTS semiconductor microcircuits and lifetime issues considerations . 13
4.2.3 Operating and thermal conditions . 13
4.3 Lifetime requirements in mission . 13
4.3.1 Lifetime requirements for electronic equipment in mission . 13
4.3.2 Lifetime requirement for COTS semiconductor microcircuit . 14
4.4 Lifetime assessment for COTS semiconductor microcircuit based on the
OCM information . 14
4.4.1 Availability of lifetime assessment by the OCM . 14
4.4.2 Lifetime compliance . 14
4.5 Lifetime assessment for a COTS semiconductor microcircuit processed by
the OEM . 14
4.5.1 Approach . 14
4.5.2 Risk analysis based on physics of failure (PoF) and the component
family . 15
4.5.3 OCM’s technical data availability and relevance . 15
4.5.4 Acceleration models assessment paths . 15
4.6 Lifetime calculation of COTS semiconductor microcircuit in mission . 16
4.7 Lifetime compliance of COTS semiconductor microcircuit in mission . 16
4.8 Situation reconsideration and alternatives . 17
4.8.1 General . 17
4.8.2 Semiconductor microcircuits change . 17
4.8.3 Lifetime mitigation solutions . 17
4.9 Final report . 18
5 Considerations with regard to semiconductor ageing level estimation for
semiconductor microcircuits . 19
Annex A (informative) Failure and degradation mechanisms of COTS semiconductor
microcircuits . 20
Annex B (informative) Example of operating and thermal mission profile for a COTS
semiconductor microcircuit . 22
Annex C (informative) Risk of failure and degradation mechanisms according to the
type of COTS semiconductor microcircuit . 23
Annex D (informative) BEOL and FEOL technological parameters . 24
Annex E (informative) Generic acceleration models . 25
Annex F (informative) Final report . 26
Bibliography . 28

Figure 1 – Process flow for lifetime assessment and selection of COTS semiconductor
microcircuits . 12
Figure B.1 – Example of thermal and operating mission profile for a semiconductor
microcircuit implemented in an electronic equipment located on the avionic bay of a
civil aircraft, assuming 30 °C of thermal dissipation . 22

Table A.1 – Some failure and degradation mechanisms for COTS semiconductor
microcircuits . 20
Table C.1 – Typical failure and degradation mechanisms according to the COTS

semiconductor microcircuit family and structure . 23
Table D.1 – BEOL and FEOL technological parameters . 24
Table E.1 – Examples of generic acceleration model based on the failure and
degradation mechanism, and based on the internal semiconductor microcircuit
structure . 25
Table F.1 – Template for final report . 26

– 4 – IEC TR 62240-2:2018 © IEC 2018
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PROCESS MANAGEMENT FOR AVIONICS –
ELECTRONIC COMPONENTS CAPABILITY IN OPERATION –

Part 2: Semiconductor microcircuit lifetime

FOREWORD
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The main task of IEC technical committees is to prepare International Standards. However, a
technical committee may propose the publication of a Technical Report when it has collected
data of a different kind from that which is normally published as an International Standard, for
example "state of the art".
IEC TR 62240-2, which is a Technical Report, has been prepared by IEC technical committee
107: Process management for avionics.
IEC TR 62240-2 adapts and modifies the GIFAS/2015/5022 document that has served as a
basis for the elaboration of this Technical Report.

The text of this Technical Report is based on the following documents:
Draft TR Report on voting
107/325/DTR 107/332/RVDTR
Full information on the voting for the approval of this Technical Report can be found in the
report on voting indicated in the above table.
This document has been drafted in accordance
...