SIST EN IEC 62228-5:2021

Integrated circuits - EMC evaluation of transceivers - Part 5: Ethernet transceivers (IEC 62228-5:2021)

IEC 62228-5:2021(E) specifies test and measurement methods for EMC evaluation of Ethernet transceiver ICs under network condition. It defines test configurations, test conditions, test signals, failure criteria, test procedures, test setups and test boards. It is applicable for transceiver of the Ethernet systems

   
• 100BASE-T1 according to ISO/IEC/IEEE 8802-3/AMD1;

   
• 100BASE-TX according to ISO/IEC/IEEE 8802-3;

   
• 1000BASE-T1 according to ISO/IEC/IEEE 8802-3/AMD4

and covers

   
• the emission of RF disturbances;

   
• the immunity against RF disturbances;

   
• the immunity against impulses;

   
• the immunity against electrostatic discharges (ESD).

Integrierte Schaltungen - Bewertung der elektromagnetischen Verträglichkeit von Sende-Empfangsgeräten - Teil 5: Ethernet-Sende-Empfangsgerät (IEC 62228-5:2021)

Circuits intégrés - Évaluation de la CEM des émetteurs-récepteurs - Partie 5 : Émetteurs-récepteurs (IEC 62228-5:2021)

L’IEC 62228-5:2021 spécifie les méthodes d’essai et de mesure pour l’évaluation de la compatibilité électromagnétique (CEM) des circuits intégrés (CI) émetteurs‑récepteurs Ethernet placés en réseau. Elle définit les configurations d’essai, les conditions d’essai, les signaux d’essai, les critères de défaillance, les procédures d’essai, les montages d’essai et les cartes d’essai. Elle s’applique à l’émetteur-récepteur des systèmes Ethernet:

   
• 100BASE-T1 conformément à l’ISO/IEC/IEEE 8802-3/AMD1;

   
• 100BASE-TX conformément à l’ISO/IEC/IEEE 8802-3;

   
• 1000BASE-T1 conformément à l’ISO/IEC/IEEE 8802-3/AMD4.

et couvre:

   
• l’émission de perturbations radioélectriques;

   
• l’immunité aux perturbations radioélectriques;

   
• l’immunité aux impulsions;

   
• l’immunité aux décharges électrostatiques (DES).

Integrirana vezja - Vrednotenje elektromagnetne združljivosti (EMC) oddajnikov-sprejemnikov - 5. del: Ethernet oddajniki-sprejemniki (IEC 62228-5:2021)

General Information

• Status: Published
• Publication Date: 17-Jun-2021
• ICS: 31.200 - Integrated circuits. Microelectronics
• ICS: 33.100.01 - Electromagnetic compatibility in general
• Technical Committee: I11 - Imaginarni 11
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 11-Jun-2021
• Due Date: 16-Aug-2021
• Completion Date: 18-Jun-2021
• Ref Project: EN IEC 62228-5:2021 - Integrated circuits - EMC evaluation of transceivers - Part 5: Ethernet transceivers

Relations

• Amended By: SIST EN IEC 62228-5:2021/oprA1:2023 - Amendment 1 - Integrated circuits - EMC evaluation of transceivers - Part 5: Ethernet transceivers
• Effective Date: 30-Nov-2021

Overview

EN IEC 62228-5:2021 - Integrated circuits: EMC evaluation of transceivers - Part 5: Ethernet transceivers - specifies standardized test and measurement methods for assessing electromagnetic compatibility (EMC) of Ethernet transceiver ICs under network conditions. Adopted by CLC/CENELEC from IEC 62228-5:2021, the standard applies to PHY/transceiver devices used in Ethernet systems such as 100BASE-T1, 100BASE-TX and 1000BASE-T1 (ISO/IEC/IEEE 8802‑3 variants). It defines test configurations, signals, test boards, failure criteria and procedures for emission and immunity evaluation, including conducted RF, impulse and electrostatic discharge (ESD) testing.

Key topics and technical requirements

• Scope and DUT modes
  • Test and operating modes for transceivers (normal operation, low-power modes) and definition of test BINs (Min‑BIN, Std‑BIN, Opt‑BIN) for interface networks.
• Test types covered
  • Emission of conducted RF disturbances
  • Immunity to conducted RF disturbances (direct RF injection and coupling)
  • Immunity to electrical impulses (transient surge/injection)
  • Electrostatic discharge (ESD) testing (unpowered/powered setups)
  • Radiated RF emission and immunity (informative annex)
• Test configuration and boards
  • Standardized network and single‑transceiver test topologies, coupling ports, and recommended test circuit boards and layouts to ensure reproducible measurements.
• Test signals and procedures
  • Defined test signals, communication sequences and procedures for normal and low-power operation to measure functional degradation or failure.
• Evaluation criteria
  • Functional pass/fail criteria, status classes for post‑exposure behavior and criteria for unpowered conditions.
• Supportive annexes
  • Normative and informative annexes with Ethernet test circuits, test boards, example limits for automotive applications, and characterization methods for common‑mode chokes and ESD suppression devices.

Practical applications

• Use EN IEC 62228-5:2021 for:
  • EMC qualification of Ethernet PHY/PHY‑MAC ICs during design validation.
  • Supplier and component acceptance testing for automotive and industrial Ethernet applications.
  • Laboratory test procedures for certification and regulatory compliance of Ethernet transceivers.
  • Selecting and verifying EMC mitigation components (chokes, TVS/ESD devices) based on annex characterization methods.

Who should use this standard

• IC and PHY designers, EMC engineers, test laboratories, OEMs (automotive, industrial networking), compliance and quality teams, and component suppliers involved with Ethernet transceiver development and certification.

Related standards

• IEC 62228-1 (general conditions), IEC 61967 (IC emission measurement), IEC 62132 (immunity), IEC 62215-3 (impulse immunity), ISO/IEC/IEEE 8802‑3 (Ethernet), ISO 10605 (vehicle ESD) - all referenced for harmonized test methods and definitions.

Standards Content (Sample)

SLOVENSKI STANDARD
01-september-2021
Integrirana vezja - Vrednotenje elektromagnetne združljivosti (EMC) oddajnikov-
sprejemnikov - 5. del: Ethernet oddajniki-sprejemniki (IEC 62228-5:2021)
Integrated circuits - EMC evaluation of transceivers - Part 5: Ethernet transceivers (IEC
62228-5:2021)
Integrierte Schaltungen - Bewertung der elektromagnetischen Verträglichkeit von Sende-
Empfangsgeräten - Teil 5: Ethernet-Sende-Empfangsgerät (IEC 62228-5:2021)
Circuits intégrés - Évaluation de la CEM des émetteurs-récepteurs - Partie 5 :
Émetteurs-récepteurs (IEC 62228-5:2021)
Ta slovenski standard je istoveten z: EN IEC 62228-5:2021
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
33.100.01 Elektromagnetna združljivost Electromagnetic compatibility
na splošno in general
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN IEC 62228-5

NORME EUROPÉENNE
EUROPÄISCHE NORM
June 2021
ICS 31.200
English Version
Integrated circuits - EMC evaluation of transceivers - Part 5:
Ethernet transceivers
(IEC 62228-5:2021)
Circuits intégrés - Évaluation de la CEM des émetteurs- Integrierte Schaltungen - Bewertung der
récepteurs - Partie 5 : Émetteurs-récepteurs elektromagnetischen Verträglichkeit von Sende-
(IEC 62228-5:2021) Empfangsgeräten - Teil 5: Ethernet-Sende-Empfangsgerät
(IEC 62228-5:2021)
This European Standard was approved by CENELEC on 2021-05-31. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2021 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 62228-5:2021 E

European foreword
The text of document 47A/1115/FDIS, future edition 1 of IEC 62228-5, prepared by SC 47A
"Integrated circuits" of IEC/TC 47 "Semiconductor devices" was submitted to the IEC-CENELEC
parallel vote and approved by CENELEC as EN IEC 62228-5:2021.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2022-02-28
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2024-05-31
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 62228-5:2021 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
CISPR 16-1-1 NOTE Harmonized as EN IEC 55016-1-1
IEC 61000-4-2 NOTE Harmonized as EN 61000-4-2
IEC 61000-4-4 NOTE Harmonized as EN 61000-4-4
IEC 61000-4-5 NOTE Harmonized as EN 61000-4-5
IEC 61967-2 NOTE Harmonized as EN 61967-2
IEC 61967-8 NOTE Harmonized as EN 61967-8
IEC 62132-2 NOTE Harmonized as EN 62132-2
IEC 62132-8 NOTE Harmonized as EN 62132-8
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1 Where an International Publication has been modified by common modifications, indicated by (mod), the
relevant EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available
here: www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 61967-1 - Integrated circuits - Measurement of EN IEC 61967-1 -
electromagnetic emissions - Part 1:
General conditions and definitions
IEC 61967-4 - Integrated circuits - Measurement of EN IEC 61967-4 -
electromagnetic emissions - Part 4:
Measurement of conducted emissions - 1
ohm/150 ohm direct coupling method
IEC 62132-1 - Integrated circuits - Measurement of EN 62132-1 -
electromagnetic immunity - Part 1: General
conditions and definitions
IEC 62132-4 - Integrated circuits - Measurement of EN 62132-4 -
electromagnetic immunity 150 kHz to 1
GHz - Part 4: Direct RF power injection
method
IEC 62215-3 - Integrated circuits - Measurement of EN 62215-3 -
impulse immunity - Part 3: Non-
synchronous transient injection method
IEC 62228-1 - Integrated circuits – EMC evaluation of EN IEC 62228-1 -
transceivers – Part 1: General conditions
and definitions
ISO 10605 - Road vehicles - Test methods for electrical - -
disturbances from electrostatic discharge
ISO 21111-2 - Road vehicles - In-vehicle Ethernet - Part - -
2: Common physical entity requirements
ISO 7637-2 - Road vehicles - Electrical disturbances - -
from conduction and coupling – Part 2:
Electrical transient conduction along supply
lines only
Publication Year Title EN/HD Year
ISO/IEC/IEEE 8802-3 2017 Information technology - - -
Telecommunications and information
exchange between systems - Local and
metropolitan area networks - Specific
requirements - Part 3: Standard for
Ethernet
+A1 2017  - -
+A4 2017  - -
EIA-198-1 - Electronic Components Industry - -
Association - Ceramic Dielectric Capacitors
Classes I, II, III and IV
IEC 62228-5 ®
Edition 1.0 2021-04
INTERNATIONAL
STANDARD
colour
inside
Integrated circuits – EMC evaluation of transceivers –

Part 5: Ethernet transceivers
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.200 ISBN 978-2-8322-9697-4

– 2 – IEC 62228-5:2021 © IEC 2021
CONTENTS
FOREWORD . 8
1 Scope . 10
2 Normative references . 10
3 Terms, definitions and abbreviated terms . 11
3.1 Terms and definitions . 11
3.2 Abbreviated terms . 12
4 General . 13
5 Test and operating conditions . 14
5.1 Supply and ambient conditions. 14
5.2 Test operation modes . 14
5.2.1 General . 14
5.2.2 Transceiver configuration for normal operation mode . 15
5.2.3 Transceiver configuration for low power mode . 15
5.3 Definition of BIN . 15
5.4 Test configuration . 16
5.4.1 General configuration for transceiver network . 16
5.4.2 General configuration for single transceiver . 18
5.4.3 Transceiver network tests – coupling ports and networks for conducted
tests . 18
5.4.4 Single transceiver tests – coupling ports and networks . 21
5.5 Test communication and signals . 22
5.5.1 General . 22
5.5.2 Test signals for normal operation mode . 22
5.5.3 Test signals for low power mode . 23
5.6 Evaluation criteria . 23
5.6.1 General . 23
5.6.2 Evaluation criteria for functional operation modes . 23
5.6.3 Evaluation criteria in unpowered condition after exposure to
disturbances . 24
5.6.4 Status classes . 25
5.7 DUT specific information . 26
6 Test and measurement . 26
6.1 Emission of conducted RF disturbances . 26
6.1.1 Test method . 26
6.1.2 Test setup . 26
6.1.3 Test procedure and parameters . 27
6.2 Immunity to conducted RF disturbances . 28
6.2.1 Test method . 28
6.2.2 Test setup . 28
6.2.3 Test procedure and parameters . 29
6.3 Immunity to impulses . 33
6.3.1 Test method . 33
6.3.2 Test setup . 33
6.3.3 Test procedure and parameters . 34
6.4 Electrostatic Discharge (ESD) . 36
6.4.1 Test method . 36
6.4.2 Test setup . 36

IEC 62228-5:2021 © IEC 2021 – 3 –
6.4.3 Test procedure and parameters . 41
7 Test report . 43
Annex A (normative) Ethernet test circuits . 44
A.1 General . 44
A.2 Test circuit for Ethernet transceivers for functional tests . 44
A.3 Test circuit for Ethernet transceivers for ESD test . 46
Annex B (normative) Test circuit boards. 49
B.1 Test circuit board for transceiver network configuration . 49
B.2 Test circuit board for single transceiver configuration . 51
Annex C (informative) Test of Ethernet transceiver for radiated RF emission and RF
immunity . 53
C.1 General . 53
C.2 General configuration for transceiver network . 53
C.3 Tests . 54
C.3.1 General . 54
C.3.2 Emission of radiated RF disturbances . 58
C.3.3 Immunity to radiated RF disturbances . 59
Annex D (informative) Examples for test limits for Ethernet transceiver in automotive
application . 63
D.1 General . 63
D.2 Emission of conducted RF disturbances . 63
D.3 Immunity to conducted RF disturbances . 64
D.4 Immunity to impulses . 68
D.5 Electrostatic discharge (ESD) . 68
D.6 Emission of radiated RF disturbances . 69
D.7 Immunity to radiated RF disturbances . 70
Annex E (informative) Characterization of common mode chokes for EMC evaluation
of Ethernet transceivers . 72
E.1 General . 72
E.2 Test . 72
E.2.1 General . 72
E.2.2 S-parameter measurement mixed mode . 73
E.2.3 ESD damage . 80
E.2.4 Saturation test at RF disturbances . 82
E.2.5 Saturation test at ESD . 85
E.2.6 TDR measurement of differential mode impedance . 87
Annex F (informative) Characterization of ESD suppression devices for EMC
evaluation of Ethernet transceivers . 89
F.1 General . 89
F.2 Test . 90
F.2.1 General . 90
F.2.2 S-parameter measurement mixed mode . 91
F.2.3 ESD damage . 97
F.2.4 ESD discharge current measurement . 100
F.2.5 Test of unwanted clamping effect at RF immunity tests . 104
Bibliography . 108

Figure 1 – Minimum MDI interface test network (Min-BIN) . 16
Figure 2 – Standard MDI interface test network (Std-BIN) . 16

– 4 – IEC 62228-5:2021 © IEC 2021
Figure 3 – Optimized MDI interface test network (Opt-BIN) . 16
Figure 4 – General test configuration for tests in transceiver network for conducted
tests . 17
Figure 5 – General test configuration for unpowered ESD test . 18
Figure 6 – Transceiver network tests – coupling ports and networks . 19
Figure 7 – Coupling ports and networks for unpowered ESD tests . 22
Figure 8 – Principle drawing of the maximum deviation on an I-V characteristic . 25
Figure 9 – Test setup for measurement of conducted RF disturbances . 27
Figure 10 – Test setup for DPI tests . 29
Figure 11 – Test setup for impulse immunity tests. 33
Figure 12 – Test setup for powered ESD tests – principle arrangement. 36
Figure 13 – Test setup for powered ESD tests – stimulation and monitoring . 37
Figure 14 – Test setup for unpowered ESD tests – principle arrangement . 38
Figure 15 – Test setup for unpowered ESD tests – stimulation and monitoring for
function validation pre and post ESD test . 40
Figure A.1 – General drawing of the circuit diagram of test network for 100BASE-T1
and 1000BASE-T1 Ethernet transceivers for functional test using conducted test
methods . 45
Figure A.2 – General drawing of the circuit diagram of test network for 100BASE-TX

Ethernet transceivers for functional test using conducted test methods . 46
Figure A.3 – General drawing of the circuit diagram for ESD tests of Ethernet
transceivers in powered mode . 47
Figure A.4 – General drawing of the circuit diagram for ESD tests of Ethernet
transceivers in unpowered mode . 48
Figure B.1 – Example of functional conducted test board for Ethernet transceiver ICs

(100BASE-T1) . 49
Figure B.2 – Example of powered ESD test board for Ethernet transceivers ICs
(100BASE-T1) . 50
Figure B.3 – Example of unpowered ESD test board for Ethernet transceivers ICs
(100BASE-T1), top layer . 51
Figure B.4 – Example of unpowered ESD test board for Ethernet transceivers ICs

(100BASE-T1), bottom layer . 51
Figure C.1 – General test configuration for tests in transceiver network used for
radiated tests . 53
Figure C.2 – General drawing of the circuit diagram of test network for 100BASE-T1
and 1000BASE-T1 Ethernet transceivers for functional test using radiated RF test
methods . 55
Figure C.3 – Example of functional radiated test board for Ethernet transceiver ICs
(100BASE-T1), top layer (DUT side) . 56
Figure C.4 – Example of functional radiated test board for Ethernet transceiver ICs
(100BASE-T1), bottom layer (external circuitry side) . 57
Figure C.5 – Test setup for measurement of radiated RF emission . 58
Figure C.6 – Test setup for radiated RF immunity tests . 60
Figure D.1 – Example of limits for conducted RF emission – MDI Opt-BIN, V and
BAT
WAKE . 63
Figure D.2 – Example of limits for conducted RF emission – local supplies . 64
Figure D.3 – Example of limits for conducted RF immunity for functional status
class A – MDI Opt-BIN . 65
IC
IEC 62228-5:2021 © IEC 2021 – 5 –
Figure D.4 – Example of limits for conducted RF immunity for functional status
class A – V and WAKE . 65
IC BAT
Figure D.5 – Example of limits for conducted RF immunity for functional status

class C or D – MDI Opt-BIN . 67
IC IC
Figure D.6 – Example of limits for conducted RF immunity for functional status
class C or D – V and WAKE . 67
IC IC BAT
Figure D.7 – Example of limits for radiated RF emission for IC stripline with 6,7 mm
active conductor height . 69
Figure D.8 – Example of limits for radiated RF immunity . 70
Figure E.1 – General electrical drawing of a CMC . 72
Figure E.2 – Test setup for S-parameter measurements at CMC . 73
Figure E.3 – Example of test board 4-port S-parameter measurement at CMC – mixed
mode, top layer . 74
Figure E.4 – Example of test board 3-port S-parameter measurement at CMC – single
ended, top layer . 74
Figure E.5 – Recommended characteristics for S , S (RL) for CMC . 77
dd11 dd22
Figure E.6 – Recommended characteristics for S (IL) for CMC. 78
dd21
Figure E.7 – Recommended characteristics for S (CMR) for CMC . 78
cc21
Figure E.8 – Recommended characteristics for S , S (LCL) for CMC . 79
dc11 dc22
Figure E.9 – Recommended characteristics for S , S (DCMR) and S ,
sd21 sd12 ds21
S (CDMR) for CMC . 79
ds12
Figure E.10 – Test setup for ESD damage tests at CMC . 80
Figure E.11 – Example of ESD test board for CMC, top layer . 81
Figure E.12 – Test setup for RF saturation measurements at CMC . 83
Figure E.13 – Example of RF saturation / S-parameter test board for CMC, top layer. 83
Figure E.14 – Test setup for ESD saturation measurements at CMC . 85
Figure E.15 – Example of ESD saturation test board for CMC, top layer . 85
Figure E.16 – Example of ESD saturation tests results for CMC . 87
Figure E.17 – Test setup for TDR measurement at CMC . 87
Figure E.18 – Example of TDR test board for CMC, top layer . 88
Figure F.1 – Arrangement of ESD suppression device within the 100BASE-T1 and

1000BASE-T1 MDI interface . 90
Figure F.2 – Test setup for S-parameter measurements at ESD suppression device . 91
Figure F.3 – Example of test board 4-port S-parameter measurement for ESD
suppression device – mixed mode, top layer . 92
Figure F.4 – Example of test board 3-port S-parameter measurement for ESD
suppression device – single ended, top layer . 92
Figure F.5 – Recommended characteristics for S (RL) for ESD suppression device . 95
dd11
Figure F.6 – Recommended characteristics for S (IL) for ESD suppression device . 95
dd21
Figure F.7 – Recommended characteristics for S (DCMR) for ESD suppression
sd21
device . 96
Figure F.8 – Test setup for ESD damage tests at ESD suppression device . 97
Figure F.9 – Example of ESD test board for ESD suppression device, top layer . 98
Figure F.10 – Test setup for ESD discharge current measurement at ESD suppression
device . 100

– 6 – IEC 62228-5:2021 © IEC 2021
Figure F.11 – Example of ESD discharge current test board for ESD suppression
device, top and bottom layer . 101
Figure F.12 – Example of test results and recommended limits for remaining ESD

discharge current after the MDI test network for ESD suppression device . 103
Figure F.13 – Test setup for RF clamping test at ESD suppression device . 104
Figure F.14 – Example of test board RF clamping test at suppression device, top layer . 105
Figure F.15 – Recommended test power levels for RF clamping tests at ESD
suppression device . 107

Table 1 – Overview of measurements and tests . 13
Table 2 – Supply and ambient conditions for functional operation . 14
Table 3 – Definition for transceiver configuration for normal operation mode . 15
Table 4 – Definition for transceiver mode configuration for low power mode . 15
Table 5 – Selection recommendation of MII interfaces for transceiver network
configuration . 18
Table 6 – Transceiver network tests – component value definitions of coupling ports
and networks . 20
Table 7 – Definitions of coupling ports for unpowered ESD tests . 22
Table 8 – Definition for transceiver mode configuration for normal operation mode . 23
Table 9 – Evaluation criteria for Ethernet transceiver . 24
Table 10 – Definition of functional status classes . 25
Table 11 – Settings of the conducted RF measurement equipment . 27
Table 12 – Conducted emission measurements . 28
Table 13 – Specifications for DPI tests . 30
Table 14 – DPI tests for functional status class A evaluation of Ethernet transceivers . 31
IC
Table 15 – DPI tests for functional status class C or D evaluation of Ethernet
IC IC
transceivers . 32
Table 16 – Specifications for impulse immunity tests . 34
Table 17 – Parameters for impulse immunity test . 34
Table 18 – Impulse immunity tests for functional status class A evaluation of
IC
Ethernet transceivers . 35
Table 19 – Impulse immunity tests for functional status class C or D evaluation of
IC IC
Ethernet transceivers . 35
Table 20 – Specifications for ESD tests . 41
Table 21 – ESD tests in powered mode for functional status class A , C and D
IC IC IC
evaluation of Ethernet transceivers . 42
Table 22 – ESD tests in unpowered mode for functional status class D evaluation of
IC
Ethernet transceiver ICs . 43
Table B.1 – Parameter ESD test circuit board . 52
Table C.1 – Settings of the radiated RF measurement equipment . 59
Table C.2 – Radiated RF emission measurements . 59
Table C.3 – Specifications for radiated RF immunity tests . 61
Table C.4 – Radiated RF immunity tests for functional status class AIC evaluation of
Ethernet transceivers . 62
Table D.1 – Example of limits for conducted RF emission – test cases with

recommended limit classes . 64

IEC 62228-5:2021 © IEC 2021 – 7 –
Table D.2 – Example of limits for conducted RF immunity – test cases with
recommended limit classes for functional status class A . 66
IC
Table D.3 – Example of limits for conducted RF immunity – test cases with

recommended limit classes for functional status class C or D . 68
IC IC
Table D.4 – Example of limits for impulse immunity – Class I . 68
Table D.5 – Example of limits for impulse immunity – test cases with recommended
limit classes for functional status class C or D . 68
IC IC
Table D.6 – Example of limits for powered and unpowered ESD tests – test cases with
recommended limits for functional status class A1 A2 A3 C or D . 69
IC, IC, IC, IC IC
Table D.7 – Example of limits for radiated RF emission – test cases with recommended
limit classes . 70
Table D.8 – Example of limits for radiated RF immunity – test cases with recommended
limit classes . 71
Table E.1 – Test procedure and parameters for 3-port test board characterization for
CMC . 75
Table E.2 – Test procedure and parameters for S-parameter measurements at CMC . 76
Table E.3 – Required S-parameter measurements for CMC . 77
Table E.4 – Test parameters for ESD damage tests at CMC . 81
Table E.5 – Required ESD tests for damage for CMC . 82
Table E.6 – Test procedure and parameters for RF saturation tests at CMC . 84
Table E.7 – Required RF saturation tests for CMC . 84
Table E.8 – Test procedure and parameters for ESD saturation tests at CMC . 86
Table E.9 – Required ESD saturation tests for CMC . 86
Table E.10 – ESD saturation break down voltage classes for CMC . 86
Table E.11 – Test procedure and parameters for TDR measurement at CMC . 88
Table E.12 – Required TDR measurements for CMC . 88
Table F.1 – Specification of ESD suppression device . 89
Table F.2 – Test procedure and parameters for 3-port test board characterization for
ESD suppression device . 93
Table F.3 – Test procedure and parameters for S-parameter measurements at ESD
suppression device . 94
Table F.4 – Required S-parameter measurements for ESD suppression device . 94
Table F.5 – Test parameters for ESD damage tests at ESD suppression device . 99
Table F.6 – Required ESD tests for damage for ESD suppression device . 99
Table F.7 – Test parameters for ESD discharge current measurement at ESD
suppression device . 102
Table F.8 – Required current measurement for ESD suppression device . 102
Table F.9 – Recommended limits for remaining ESD discharge current after the MDI
test network for ESD suppression device . 103
Table F.10 – Limit classes and related applied ESD test voltages . 104
Table F.11 – Test procedure and parameters for RF clamping tests at ESD
suppression device . 106
Table F.12 – Required RF clamping tests for ESD suppression device . 107

– 8 – IEC 62228-5:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
INTEGRATED CIRCUITS –
EMC EVALUATION OF TRANSCEIVERS –

Part 5: Ethernet transceivers
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
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International Standard IEC 62228-5 has been prepared by subcommittee 47A: Integrated
circuits, of IEC technical committee 47: Semiconductor devices.
The text of this International Standard is based on the following documents:
Draft Report on voting
47A/1115/FDIS 47A/1117/RVD
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.

IEC 62228-5:2021 © IEC 2021 – 9 –
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/standardsdev/publications.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates
that it contains colours which are considered to be useful for the correct understanding
of its contents. Users should therefore print this document using a colour printer.

– 10 – IEC 62228-5:2021 © IEC 2021
INTEGRATED CIRCUITS –
EMC EVALUATION OF TRANSCEIVERS –

Part 5: Ethernet transceivers
1 Scope
This part of IEC 62228 specifies test and measurement methods for EMC evaluation of Ethernet
transceiver ICs under network condition. It defines test configurations, test conditions, test
signals, failure criteria, test procedures, test setups and test boards. It is applicable for
transceiver of the Ethernet systems
• 100BASE-T1 according to ISO/IEC/IEEE 8802-3/AMD1;
• 100BASE-TX according to ISO/IEC/IEEE 8802-3;
• 1000BASE-T1 according to ISO/IEC/IEEE 8802-3/AMD4
and covers
• the emission of RF disturbances;
• the immunity against RF disturbances;
• the immunity agai
...