Space engineering - Electrical design and interface requirements for power supply

The target applications covered by this standard are all missions traditionally provided with power distribution and protection by LCLs/RLCLs (science, earth observation, navigation) with exclusion of telecom applications which are traditionally provided with power distribution and protection by fuses.
The present standard applies to power distribution by LCLs/RLCLs for power systems, and in general for satellites, required to be Single Point Failure Free.
The present standard document applies exclusively to the main bus power distribution by LCLs/RLCLs to external satellite loads.
Internal power system protections of LCLs/RLCLs are not covered.
Paralleling of LCLs to increase power supply line reliability is not covered by the present standard, since this choice does not appreciably change the reliability of the overall function (i.e. LCL plus load).
In fact, a typical reliability figure of the LCL (limited to the loss of its switch ON capability) is 20 FIT or less.
If the load to be connected to the LCL line has a substantial higher failure rate than this, it is not necessary to duplicate the LCL to supply that load.

Raumfahrttechnik - Anforderungen an Schnittstellen für elektrische Leistung

Ingénierie spatiale - Exigences de conception et d'interface électriques pour alimentation bord

Vesoljska tehnika - Električna zasnova in zahteve vmesnika za napajalna omrežja

Vse ciljne aplikacije, zajete v tem standardu, so misije, ki so običajno zagotovljene z distribucijo električne energije in zaščito z omejevalniki LCL/RLCL (znanost, zemeljska opazovanja, navigacija), razen telekomunikacijskih aplikacij, ki so običajno zagotovljene z distribucijo električne energije in zaščito z varovalkami.
Ta standard se uporablja za distribucijo električne energije z omejevalniki LCL/RLCL za napajalne sisteme in na splošno za satelite, ki morajo biti brez enotočkovnih napak.
Ta dokument se uporablja izključno za distribucijo električne energije prek glavnega vodila z omejevalniki LCL/RLCL za zunanja bremena satelita.
Notranja zaščita napajalnih sistemov omejevalnikov LCL/RLCL ni zajeta.
Vzporedna vezava omejevalnikov LCL za povečanje zanesljivosti oskrbe z električno energijo ni zajeta v tem standardu, saj ta izbira ne spremeni znatno zanesljivosti celotne funkcionalnosti (tj. omejevalnika LCL z bremenom).
Običajna vrednost zanesljivosti omejevalnika LCL (omejena na izgubo zmogljivosti vklopa stikala) je 20 FIT ali manj.
Če ima breme za povezavo z linijo omejevalnika LCL znatno višjo stopnjo napake v primerjavi z omenjeno, podvojevanje omejevalnika LCL za napajanje tega bremena ni potrebno.

General Information

Status
Published
Public Enquiry End Date
29-Apr-2016
Publication Date
17-Sep-2018
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
24-Aug-2018
Due Date
29-Oct-2018
Completion Date
18-Sep-2018

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2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.Raumfahrttechnik - Anforderungen an Schnittstellen für elektrische LeistungIngénierie spatiale - Exigences de conception et d'interface électriques pour alimentation bordSpace engineering - Electrical design and interface requirements for power supply49.140Vesoljski sistemi in operacijeSpace systems and operationsICS:Ta slovenski standard je istoveten z:EN 16603-20-20:2018SIST EN 16603-20-20:2018en,fr,de01-november-2018SIST EN 16603-20-20:2018SLOVENSKI

STANDARD
SIST EN 16603-20-20:2018
EUROPEAN STANDARD NORME EUROPÉENNE EUROPÄISCHE NORM
EN 16603-20-20
August
t r s z ICS
v {ä s v r
English version

Space engineering æ Electrical design and interface requirements for power supply

Ingénierie spatiale æ Exigences de conception et d 5interface électriques pour alimentation bord

Raumfahrttechnik æ Anforderungen an Schnittstellen für elektrische Leistung This European Standard was approved by CEN on

s r April
t r s yä

C Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alterationä Upætoædate lists and bibliographical references concerning such national standards may be obtained on application to the CENæCENELEC Management Centre or to any CEN and CENELEC memberä

translation under the responsibility of a CEN and CENELEC member into its own language and notified to the CENæCENELEC Management Centre has the same status as the official versionsä

CEN and CENELEC members are the national standards bodies and national electrotechnical committees of Austriaá Belgiumá Bulgariaá Croatiaá Cyprusá Czech Republicá Denmarká Estoniaá Finlandá Former Yugoslav Republic of Macedoniaá Franceá Germanyá Greeceá Hungaryá Icelandá Irelandá Italyá Latviaá Lithuaniaá Luxembourgá Maltaá Netherlandsá Norwayá Polandá Portugalá Romaniaá Serbiaá Slovakiaá Sloveniaá Spainá Swedená Switzerlandá Turkey and United Kingdomä

CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels y any means reserved worldwide for CEN national Members and for CENELEC Membersä Refä Noä EN

s x x r uæ t ræ t rã t r s z ESIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 2 Table of contents European Foreword ................................................................................................... 5 Introduction ................................................................................................................ 6 1 Scope ....................................................................................................................... 7 2 Normative references ............................................................................................. 8 3 Terms, definitions and abbreviated terms ............................................................ 9 3.1 Terms from other standards ...................................................................................... 9 3.2 Terms specific to the present standard ..................................................................... 9 3.3 Abbreviated terms................................................................................................... 18 3.4 Nomenclature ......................................................................................................... 18 4 Principles .............................................................................................................. 20 4.1 General ................................................................................................................... 20 4.2 Standard assumptions ............................................................................................ 20 5 Requirements ........................................................................................................ 21 5.1 Reference power bus specifications ....................................................................... 21 5.2 Functional/Source interface requirements ............................................................... 23 5.2.1 LCL/HLCL class ........................................................................................ 23 5.2.2 RLCL class ............................................................................................... 23 5.2.3 Current limitation section ........................................................................... 23 5.2.4 Trip-off section .......................................................................................... 24 5.2.5 UVP section .............................................................................................. 24 5.2.6 Telecommand section features ................................................................. 25 5.2.7 Conditions at start-up/ switch-off ............................................................... 25 5.2.8 Telemetry section ...................................................................................... 26 5.2.9 Status section ........................................................................................... 28 5.2.10 Repetitive overload ................................................................................... 28 5.2.11 Reverse current tolerance ......................................................................... 28 5.2.12 Parallel connection .................................................................................... 29 5.2.13 Switching options ...................................................................................... 29 5.2.14 LCL Switch dissipative failure .................................................................... 31 SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 3 5.2.15 Loss of LCL lines ...................................................................................... 32 5.2.16 Noise immunity ......................................................................................... 32 5.2.17 Output impedance envelope, when in limitation ........................................ 32 5.2.18 Noise immunity feature ............................................................................. 33 5.2.19 Output LCL load (Input load characteristic) ............................................... 33 5.3 Functional/Load interface requirements .................................................................. 34 5.3.1 Nominal feature ......................................................................................... 34 5.3.2 Switch-on .................................................................................................. 34 5.3.3 LCL switch dissipative failure .................................................................... 35 5.3.4 Load test condition .................................................................................... 35 5.3.5 User UVP at bus input side ....................................................................... 35 5.4 Performance/Source interface requirements ........................................................... 36 5.4.1 Overall requirements ................................................................................. 36 5.4.2 Start-up/Switch-off requirements ............................................................... 37 5.4.3 UVP .......................................................................................................... 38 5.4.4 Switch-on capability .................................................................................. 39 5.4.5 Voltage drop.............................................................................................. 40 5.4.6 Stability ..................................................................................................... 40 5.4.7 Current Telemetry, accuracy ..................................................................... 41 5.4.8 Current Telemetry, offset........................................................................... 41 5.4.9 Retrigger interval ....................................................................................... 42 5.4.10 dI/dt limit on retrigger ON edge ................................................................. 42 5.4.11 dI/dt limit on retrigger OFF edge ................................................................ 42 5.4.12 Status, accuracy ....................................................................................... 42 5.5 Performance/Load interface requirements .............................................................. 43 5.5.1 Load reverse current ................................................................................. 43 5.5.2 Load characteristic .................................................................................... 43 5.5.3 Source-load characteristic ......................................................................... 44 5.5.4 Start-up surge input current ....................................................................... 44 5.5.5 Internal load Input current limitation .......................................................... 45 Annex A (informative) Requirements mapping ...................................................... 46 Bibliography ............................................................................................................. 60

SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 4 Figures Figure 3-1: LCL overload timing diagram (case 1) ................................................................ 13 Figure 3-2: LCL overload timing diagram (case 2) ................................................................ 13 Figure 3-3: Typical start-up current profile of a DC/DC converter attached to a LCL ............. 14 Figure 3-4: RLCL overload timing diagram ........................................................................... 14

Tables Table 3-1: LCL classes ......................................................................................................... 15 Table 3-2: RLCL classes ...................................................................................................... 16 Table 3-3: HLCL classes ...................................................................................................... 17 Table 5-1: Reference Power Bus Specifications ................................................................... 22

SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 5 European Foreword This document (EN 16603-20-20:2018) has been prepared by Technical Committee CEN-CENELEC/TC 5 “Space”, the secretariat of which is held by DIN. This standard (EN 16603-20-20:2018) originates from ECSS-E-ST-20-20C. This European Standard shall be given the status of a national standard, either by publication of an identical text or by endorsement, at the latest by February 2019, and conflicting national standards shall be withdrawn at the latest by February 2019. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CEN shall not be held responsible for identifying any or all such patent rights. This document has been prepared under a standardization request given to CEN by the European Commission and the European Free Trade Association. This document has been developed to cover specifically space systems and has therefore precedence over any EN covering the same scope but with a wider domain of applicability (e.g. : aerospace). According to the CEN-CENELEC Internal Regulations, the national standards organizations of the following countries are bound to implement this European Standard: Austria, Belgium, Bulgaria, Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 6 Introduction This standard identifies the requirements needed to specify, procure or develop a space power distribution based on Latching Current Limiters, both from source and load perspective. For a reference architecture description, it is possible to refer to ECSS-E-HB-20-20. ECSS-E-HB-20-20 includes a clarification of the principles of operation of a power distribution based on LCLs, identifies important issues related to LCLs and explains the requirements of the present standard. Note that the present issue of the standard covers electrical design and interface requirements for power distribution based on Latching Current Limiters only. Future issues of the present standard will cover additional power interfaces. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 7 1 Scope The target applications covered by this standard are all missions traditionally provided with power distribution and protection by LCLs/RLCLs (science, earth observation, navigation) with exclusion of applications for which the power distribution and protection is provided by fuses (e.g. most of the GEO telecom satellites). The present standard applies to power distribution by LCLs/RLCLs for power systems, and in general for satellites, required to be Single Point Failure Free.

The present standard document applies exclusively to the main bus power distribution by LCLs/RLCLs to external satellite loads. A particular case of LCLs (Heater LCLs, or HLCLs) is also treated. The HLCLs are the protections elements of the power distribution to the thermal heaters in a spacecraft. Internal power system protections of LCLs/RLCLs are not covered. Paralleling of LCLs to increase power supply line reliability is not covered by the present standard, since this choice does not appreciably change the reliability of the overall function (i.e. LCL plus load). In fact, a typical reliability figure of the LCL (limited to the loss of its switch-on capability) is 20 FIT or less. If the load to be connected to the LCL line has a substantial higher failure rate than this, it is not necessary to duplicate the LCL to supply that load.

This standard may be tailored for the specific characteristic and constrains of a space project in conformance with ECSS-S-ST-00. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 8 2 Normative references The following normative documents contain provisions which, through reference in this text, constitute provisions of this ECSS Standard. For dated references, subsequent amendments to, or revision of any of these publications do not apply. However, parties to agreements based on this ECSS Standard are encouraged to investigate the possibility of applying the more recent editions of the normative documents indicated below. For undated references, the latest edition of the publication referred to applies.

EN reference Reference in text Title EN 16601-00-01 ECSS-S-ST-00-01 ECSS system - Glossary of terms EN 16603-20 ECSS-E-ST-20 Space engineering - Electrical and electronic

SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 9 3 Terms, definitions and abbreviated terms 3.1 Terms from other standards a. For the purpose of this Standard, the terms and definitions from ECSS-S-ST-00-01 apply, in particular for the following terms: 1. redundancy 2. active redundancy 3. hot redundancy 4. cold redundancy 5. fault 6. fault tolerance 3.2 Terms specific to the present standard 3.2.1 centralised feature that serves a number of elementary functions in a system 3.2.2 current overshoot decay time maximum time constant decay time from current overshoot peak to actual limitation current after an overcurrent event, under the assumption that the decay time is modelled by an exponential law 3.2.3 current overshoot recovery time time needed for the to reduce from its maximum value to ±10 % of the excess current, at the application of an overload to the LCL/RLCL/HLCL NOTE 1 See Figure 3-1 and Figure 3-2.

NOTE 2 Excess current is intended as overshoot peak minus actual limitation current value.

3.2.4 fault condition
internal failure of one of the following devices: LCL, RLCL or HLCL NOTE

This definition is aimed at clarifying that the fault condition is not the one relevant to the load. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 10 3.2.5 fault current emission maximum current emission of a given circuit at external interface under abnormal conditions NOTE

Abnormal in this context can cover fault condition or operator error. 3.2.6 fault current tolerance minimum abnormal interface current that a circuit can sustain without being damaged 3.2.7 fault voltage emission maximum voltage emission of a given circuit at external interface under abnormal conditions NOTE

Abnormal condition can cover fault condition or operator error. 3.2.8 fault voltage tolerance minimum abnormal interface voltage that a circuit can sustain without being damaged 3.2.9 feature part of a function to which a specific requirement refers 3.2.10 heater latching current limiter HLCL LCL used as protection element in a power distribution to satellite thermal heaters 3.2.11 input filter charge time time required for the LCL to charge the load input filter NOTE

See Figure 3-3. 3.2.12 input overshoot charge charge requested at the LCL/RLCL/HLCL input at the application of an overload, for current in excess of the actual limitation current NOTE

See Figure 3-1 and Figure 3-2. 3.2.13 latching current limiter LCL switchable and latching protection placed between a power source and the relevant load, causing a trip-off after having achieved at its output an overcurrent limitation for a definite trip-off time SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 11 3.2.14 LCL class maximum allowable current that can flow through the LCL itself, under given standard conditions NOTE

LCL classes are defined in Table 3-1. 3.2.15 LCL switch dissipative failure failure corresponding to an equivalent gate to drain short circuit on a MOSFET

NOTE

The voltage across is approximately 4 V to 5 V maximum. 3.2.16 nominal condition operative condition of the LCL/RLCL/HLCL, with no internal failure 3.2.17 repetitive overload overcurrent event that repeats for a number of cycles or indefinitely 3.2.18 retriggerable latching current limiter RLCL LCL that automatically attempts to switch ON when powered or after a retrigger interval when a trip-off event occurred 3.2.19 retriggerability characteristic of an RLCL protection to be able to restart automatically after being triggered 3.2.20 retrigger interval time duration in high impedance state of a RLCL after a permanent overcurrent event occurred and the relevant trip-off time elapsed NOTE 1 See Figure 3-4. NOTE 2 High impedance state is equivalent to OFF condition. 3.2.21 RLCL class maximum allowable current that can flow through the RLCL itself, under given standard conditions NOTE

RLCL classes are defined in Table 3-2. 3.2.22 sub-feature sub-part of a function to which a specific requirement refers 3.2.23 switch-on response time time needed to enable actual ON command reception, under specified conditions SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 12 3.2.24 UVP switch-off response time time to achieve UVP action in dynamical conditions, when under voltage excitation is achieved under standard conditions NOTE

The UVP action is the OFF of the relevant function.

3.2.25 time to current overshoot maximum time from max limitation current to actual current overshoot peak after an overcurrent event NOTE

See Figure 3-1 and Figure 3-2. 3.2.26 trip-off event occurring when a current protection latch flips and opens the protected distribution line after an overcurrent condition NOTE

To open a distribution line means to set the distribution line in high impedance status. 3.2.27 trip-off time time in between LCL crossing actual current limitation value and the trip-off event, in permanent overcurrent condition. NOTE

See Figure 3-1 and Figure 3-2. 3.2.28 undervoltage protection UVP protection that is triggered when the voltage provided to a function falls below a predefined threshold NOTE

LCL and RLCL are examples of functions for which UVP is activated. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 13 Trip-off time Current OvershootLimitationCurrentNominal LCLcurrent (LCL Class)MaxActualMin{Time to Current OvershootExcessCurrent±10% of ExcessCurrentmaximum overshoot recovery timeCurrent OvershootDecay Timeovershoot charge Time Current Figure 3-1: LCL overload timing diagram (case 1) Tripoff time Current OvershootLimitationCurrentNominal LCLcurrent (LCL Class)MaxActualMin{Time to Current OvershootExcessCurrent±10% of ExcessCurrentmaximum overshoot recovery timeovershoot charge Time Current Figure 3-2: LCL overload timing diagram (case 2) NOTE

Figure 3-1 and Figure 3-2 show typical current diagrams expected when an LCL/RLCL/HLCL are subject to an overload. They can represent either the LCL/RLCL/HLCL input or output current. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 14

Figure 3-3: Typical start-up current profile of a DC/DC converter attached to a LCL Trip-off time Current OvershootLimitationCurrentNominal LCL current (LCL Class)MaxActualMin{Retrigger interval TimeOverload

Current
Figure 3-4: RLCL overload timing diagram
LCL Current Limitation
Nominal load consumption
Input Filter Charge time Time
Current SIST EN 16603-20-20:2018
EN 16603-20-20:2018 (E) 15 Table 3-1: LCL classes
LCL class
LCL class Characteristic
1 2 3 4 5 6 8 10
1 2 3 4A 4B 5 6 8 10 Regulated Bus voltage [V]
50 Unregulated Bus voltage [V]
22 to 38
32 to 52 Class current [A]
1 2 3 4 5 6 8 10
1 2 3 4 4 5 6 8 10 Min limitation current [A]
1,1 2,2 3,3 4,4 5,5 6,6 8,8 11
1,1 2,2 3,3 4,4 4,4 5,5 6,6 8,8 11 Max limitation current [A]
1,4 2,8 4,2 5,6 7 8,4 11,2 14
1,4 2,8 4,2 5,6 5,6 7 8,4 11,2 14 Trip-off min [ms]
10 10 6 6 4 2 2 1,5
10 6 4 2 4 2 2 2 1,5 Trip-off max [ms]
20 20 12 12 8 4 4 3
20 12 8 4 8 4 4 4 3
Max load capacitance [µF]
Regulated bus
272 545 490 653 545 327 436 408
152 183 183 122 244 152 183 244 229 Unregulated bus
203 405 365 486 405 243 324 304
148 178 178 118 237 148 178 237 222
SIST EN 16603-20-20:2018
EN 16603-20-20:2018 (E) 16 Table 3-2: RLCL classes Characteristic
LCL class
LCL class
0,5 1 2A 2B
0,5 1A 1B 2 Regulated Bus voltage [V]
50 Unregulated Bus voltage [V]
22 to 38
32 to 52 Class current [A]
0,5 1 2 2
0,5 1 1 2 Min limitation current [A]
0,55 1,1 2,2 2,2
0,55 1,1 1,1 2,2 Max limitation current [A]
0,7 1,4 2,8 2,8
0,7 1,4 1,4 2,8 Trip-off min [ms]
10 10 4 10
10 4 6 4 Trip-off max [ms]
20 20 8 20
20 8 12 8
Max load capacitance [µF]
Regulated bus
136 272 218 545
76 61 91 122 Unregulated bus
101 203 162 405
74 59 89 118
SIST EN 16603-20-20:2018
EN 16603-20-20:2018 (E) 17 Table 3-3: HLCL classes
LCL class
LCL class Characteristic
1 2 3 4 5 6 8 10
1 2 3 4
5 6 8 10 Regulated Bus voltage [V]
50 Unregulated Bus voltage [V]
22 to 38
32 to 52 Class current [A]
1 2 3 4 5 6 8 10
1 2 3 4
5 6 8 10 Min limitation current [A]
1,1 2,2 3,3 4,4 5,5 6,6 8,8 11
1,1 2,2 3,3 4,4
5,5 6,6 8,8 11 Max limitation current [A]
1,4 2,8 4,2 5,6 7 8,4 11,2 14
1,4 2,8 4,2 5,6
7 8,4 11,2 14 Trip-off min [ms]
0,5 0,5 0,5 0,5 0,5 0,5 0,5 0,5
0,5 0,5 0,5 0,5
0,5 0,5 0,5 0,5 Trip-off max [ms]
2 2 2 2 2 2 2 2
2 2 2 2
2 2 2 2
Max parasitic capacitance [µF]
Regulated bus
1 1 1 1 1 1 1 1
1 1 1 1
1 1 1 1 Unregulated bus
1 1 1 1 1 1 1 1
1 1 1 1
1 1 1 1 SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 18 3.3 Abbreviated terms For the purpose of this Standard, the abbreviated terms from ECSS-S-ST-00-01 and the following apply:

Abbreviation Meaning EMC electromagnetic compatibility ESD electrostatic discharge FDIR failure detection, isolation and recovery FIT failure in time FMECA failure modes, effects, and criticality analysis HLCL heater latching current limiter LCL latching current limiter MB main bus PCDU power conditioning and distribution unit RLCL retriggerable latching current limiter SC short circuit SEE single event effect SSE space segment element SSS space segment subsystem UVP undervoltage protection

3.4 Nomenclature The following nomenclature applies throughout this document: a. The word “shall” is used in this Standard to express requirements. All the requirements are expressed with the word “shall”. b. The word “should” is used in this Standard to express recommendations. All the recommendations are expressed with the word “should”. NOTE

It is expected that, during tailoring, recommendations in this document are either converted into requirements or tailored out. c. The words “may” and “need not” are used in this Standard to express positive and negative permissions, respectively. All the positive permissions are expressed with the word “may”. All the negative permissions are expressed with the words “need not”. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 19 d. The word “can” is used in this Standard to express capabilities or possibilities, and therefore, if not accompanied by one of the previous words, it implies descriptive text. NOTE

In ECSS “may” and “can” have completely different meanings: “may” is normative (permission), and “can” is descriptive. e. The present and past tenses are used in this Standard to express statements of fact, and therefore they imply descriptive text. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 20 4 Principles 4.1 General The indicated requirements verification (see clause 5) identifies the overall applicable methods to confirm compliance to the requirements, without explicitly explaining how the verification is split at applicability level (equipment, SSE/SSS or SSE/SSS/equipment). The verification methods suggested for the verification of the requirements are listed in Annex A. 4.2 Standard assumptions a. The assumption for the maximum qualification temperature of the unit hosting the power distribution LCLs/RLCLs/HLCLs is 70 °C. b. The bus voltage time derivative at bus application or removal varies from 0 V/µs to 0,1 V/µs. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 21 5 Requirements 5.1 Reference power bus specifications a. The power distribution by LCLs/RLCLs shall work nominally for applicable nominal DC bus voltage range, nominal bus ripple voltage and voltage transients according to Table 5-1.

NOTE

Nominally means “within the nominal functional and performance requirements”. b. The power distribution by LCLs/RLCLs shall survive for applicable abnormal DC bus voltage range and abnormal bus voltage transients according to Table 5-1. NOTE

A component is meant to survive if its rating is respected. c. The power distribution by LCLs/RLCLs for unregulated 28 V and 50 V bus cases shall work nominally for applicable abnormal DC bus voltage range according to Table 5-1. NOTE 1 The requirement 5.1c is explained by the same applicable minimum and maximum voltage limits both for nominal and abnormal (emission) DC bus voltage range for unregulated 28 V and 50 V bus cases. NOTE 2 Nominally means “within the nominal functional and performance requirements”. d. LCLs/RLCLs shall not trip off up to maximum abnormal DC bus voltage limits as per to Table 5-1, unless the application of such limits result in an overload. NOTE

The load short circuit in presence of abnormal DC bus voltage (fault tolerance) is not taken into account. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 22 Table 5-1: Reference Power Bus Specifications Power Bus type : 28V regulated bus [V] 50V regulated bus [V] 28V unregulated bus [V] 50V unregulated bus [V] Nominal DC Bus Voltage Range at regulation point Min 28 -1 % 50 -1 % 22 32 Max 28 +1 % 50 +1 % 38 52 Nominal DC Bus Voltage Range at load side Min 28 -5 % 50 -5 % 22 38 Max 28 +1 % 50 +1 % 38 52 Abnormal DC Bus voltage range

Min 0 0 0 0 Max (fault tolerance) N/A N/A 40 55 Max (fault emission) 38 52 Nominal Bus ripple voltage Max According to

ECSS-E-ST-20 Up to ± 500

mVpp in the range of 30 Hz to 50 MHz Up to ± 500 mVpp in the range of 30 Hz to 50 MHz Nominal Bus voltage transients Max According to

ECSS-E-ST-20 ±1,4 V for load steps of 50 %, with dI/dt=1A/µs ±2,5 V for load steps of 50 %, with dI/dt=1A/µs Abnormal Bus voltage transients Max 0 to 34 max 0 to 60 max Within Power Bus abnormal DC limits

SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 23 5.2 Functional/Source interface requirements 5.2.1 LCL/HLCL class 5.2.1.1 LCL/HLCL class

5.2.1.1.1 Nominal condition a. The LCL class shall be selected among one shown in Table 3-1 and comply with related class performance. NOTE

The performance of the LCL classes can be achieved by using several MOSFETs in parallel. b. The HLCL class shall be selected among one shown in Table 3-3 and comply with related class performance. 5.2.2 RLCL class 5.2.2.1 RLCL class 5.2.2.1.1 Nominal condition a. The RLCL class shall be selected among one shown in Table 3-2 and comply with related class performance. NOTE

The performance of the LCL classes are typically achieved by using several MOSFET switches. 5.2.3 Current limitation section 5.2.3.1 Range 5.2.3.1.1 Nominal condition a. The LCL/RLCL/HLCL shall limit the output current between the minimum and maximum limitation values. 5.2.3.2 Switch element, position 5.2.3.2.1 Nominal condition a. For LCL/RLCL/HLCL, the switch element shall be on the hot main bus side. 5.2.3.3 Current sensing element, position 5.2.3.3.1 Nominal condition a. For LCL/RLCL/HLCL, the current sensor element shall be on the hot main bus side. SIST EN 16603-20-20:2018

EN 16603-20-20:2018 (E) 24 5.2.3.4 Current limitation, LCL rating 5.2.3.4.1 Nominal condition a. In current limitation mode, the LCL/HLCL components application shall respect the relevant rating limits.

5.2.3.5 Current limitation, RLCL derating 5.2.3.5.1 Nominal condition a. In current limitation mode, the RLCL components application shall respect the relevant derating limits. 5.2.4 Trip-off section 5.2.4.1 Range 5.2.4.1.1 Nominal condition a. In case the load current exceeds the relevant limit, the LCL/RLCL/HLCL shall switch-off within i

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