Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-1: General test methods for materials and assemblies - Guidance for printed board assemblies

IEC 61189-5-1:2016 is a catalogue of test methods representing methodologies and procedures that can be applied to test printed board assemblies. This part of IEC 61189 contains the types of content of the IEC 61189-5 series, as well as guidance documents and handbooks for printed board assemblies.

Prüfverfahren für Elektromaterialien, Leiterplatten und andere Verbindungsstrukturen und Baugruppen - Teil 5-1: Allgemeine Prüfverfahren für Materialien und Baugruppen - Leitfaden für Baugruppen von Leiterplatten

Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres structures d'interconnexion et ensembles - Partie 5-1: Méthodes d'essai générales pour les matériaux et assemblages - Lignes directrices pour les assemblages de cartes à circuit imprimé

L'IEC 61189-5-1:2016 est un catalogue de méthodes d'essai qui représentent les méthodologies et les modes opératoires qui peuvent être appliqués aux assemblages de cartes à circuit imprimé. La présente partie de l'IEC 61189 récapitule le contenu de la série IEC 61189-5, ainsi que les documents et manuels avec les lignes directrices relatives aux assemblages de cartes à circuit imprimé.

Preskusne metode za električne materiale, tiskane plošče ter druge povezovalne strukture in sestave - 5-1. del: Splošne preskusne metode za materiale in sestave - Navodilo za sestave plošč tiskanih vezij

Ta del standarda IEC 61189 je katalog preskusnih metod, ki predstavljajo metodologije in postopke, ki jih je mogoče uporabiti za preskušanje sestavov plošč tiskanih vezij. Ta del standarda IEC 61189 vsebuje vrste vsebine skupine standardov IEC 61189-5 ter tudi dokumente z navodili in priročnike za sestave plošč tiskanih vezij.

General Information

Status
Published
Publication Date
29-Sep-2016
Withdrawal Date
08-Aug-2019
Current Stage
6060 - Document made available - Publishing
Start Date
30-Sep-2016
Completion Date
30-Sep-2016

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Standards Content (Sample)


SLOVENSKI STANDARD
01-december-2016
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Test methods for electrical materials, printed boards and other interconnection structures
and assemblies - Part 5-1: General test methods for materials and assemblies -
Guidance for printed board assemblies
Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres
structures d'interconnexion et ensembles - Partie 5-1: Méthodes d'essai générales pour
les matériaux et assemblages - Lignes directrices pour les assemblages de cartes à
circuit imprimé
Ta slovenski standard je istoveten z: EN 61189-5-1:2016
ICS:
31.180 7LVNDQDYH]MD 7,9 LQWLVNDQH Printed circuits and boards
SORãþH
31.190 Sestavljeni elektronski Electronic component
elementi assemblies
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN 61189-5-1

NORME EUROPÉENNE
EUROPÄISCHE NORM
September 2016
ICS 31.180
English Version
Test methods for electrical materials, printed boards and other
interconnection structures and assemblies - Part 5-1: General
test methods for materials and assemblies - Guidance for printed
board assemblies
(IEC 61189-5-1:2016)
Méthodes d'essai pour les matériaux électriques, les cartes Prüfverfahren für Elektromaterialien, Leiterplatten und
imprimées et autres structures d'interconnexion et andere Verbindungsstrukturen und Baugruppen - Teil 5-1:
ensembles - Partie 5-1: Méthodes d'essai générales pour Allgemeine Prüfverfahren für Materialien und Baugruppen -
les matériaux et assemblages - Lignes directrices pour les Leitfaden für Baugruppen von Leiterplatten
assemblages de cartes à circuit imprimé (IEC 61189-5-1:2016)
(IEC 61189-5-1:2016)
This European Standard was approved by CENELEC on 2016-08-09. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 61189-5-1:2016 E
European foreword
The text of document 91/1273/CDV, future edition 1 of IEC 61189-5-1, prepared by
IEC/TC 91 "Electronics assembly technology" was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN 61189-5-1:2016.

The following dates are fixed:
(dop) 2017-05-09
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2019-08-09
standards conflicting with the
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.
Endorsement notice
The text of the International Standard IEC 61189-5-1:2016 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 60068 (series) NOTE Harmonized as EN 60068 (series).
IEC 60068-1:2013 NOTE Harmonized as EN 60068-1:2014.
IEC 60068-2-20 NOTE Harmonized as EN 60068-2-20.
IEC 60068-2-58:2015 NOTE Harmonized as EN 60068-2-58:2015.
IEC 61189-1 NOTE Harmonized as EN 61189-1.
IEC 61189-5 (series) NOTE Harmonized as EN 61189-5 (series).
IEC 61189-5 NOTE Harmonized as EN 61189-5.
IEC 61189-5-1:2016 NOTE Harmonized as EN 61189-5-1:2016.
IEC 61189-5-2:2015 NOTE Harmonized as EN 61189-5-2:2015.
IEC 61189-5-3:2015 NOTE Harmonized as EN 61189-5-3:2015.
IEC 61189-5-4:2015 NOTE Harmonized as EN 61189-5-4:2015.
IEC 61189-6 NOTE Harmonized as EN 61189-6.
IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1.
IEC 61190-1-2 NOTE Harmonized as EN 61190-1-2.
IEC 61190-1-3 NOTE Harmonized as EN 61190-1-3.

IEC 61249-2-7 NOTE Harmonized as EN 61249-2-7.
IEC 62137:2004 NOTE Harmonized as EN 62137:2004.
ISO 9001 NOTE Harmonized as EN ISO 9001.
ISO 9455-1 NOTE Harmonized as EN 29455-1.
ISO 9455-2 NOTE Harmonized as EN 29455-2.

IEC 61189-5-1 ®
Edition 1.0 2016-07
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Test methods for electrical materials, printed boards and other interconnection

structures and assemblies –
Part 5-1: General test methods for materials and assemblies – Guidance for

printed board assemblies
Méthodes d'essai pour les matériaux électriques, les cartes imprimées et autres

structures d'interconnexion et ensembles –

Partie 5-1: Méthodes d'essai générales pour les matériaux et les assemblages –

Lignes directrices pour les assemblages de cartes à circuit imprimé

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180 ISBN 978-2-8322-3506-5

– 2 – IEC 61189-5-1:2016 © IEC 2016
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 8
2 Normative references. 8
3 Accuracy, precision and resolution . 8
3.1 General . 8
3.2 Accuracy . 8
3.3 Precision . 9
3.4 Resolution. 10
3.5 Report . 10
3.6 Student’s t distribution . 10
3.7 Suggested uncertainty limits . 11
4 Catalogue of approved test methods . 12
5 List of contents of the IEC 61189-5 series . 12
Annex A (informative) Tests . 13
Annex B (informative) Guidance documents and handbooks . 15
B.1 General . 15
B.2 Handbook and guide to supplement IPC-J-STD-001 . 15
B.3 Guidelines for Electrically Conductive Surface Mount Adhesives (IPC-3406) . 15
B.4 Users Guide for Cleanliness of Unpopulated Printed Boards (IPC-5701) . 15
B.5 Guidelines for OEM’s in Determining Acceptable Levels of Cleanliness of
Unpopulated Printed Boards (IPC-5702) . 15
B.6 Surface Insulation Resistance Handbook (IPC-9201) . 16
B.7 Material and Process Characterisation / Qualification Test Protocol for
Assessing Electrochemical Performance (IPC-9202) . 16
B.8 User Guide for the IPC/IEC B52 Process Qualification Test Vehicle
(IPC-9203) . 16
B.9 PWB Assembly Soldering Process Guideline for Electronic Components
(IPC-9502) . 16
B.10 Aqueous Post Solder Cleaning Handbook (IPC-AC-62A) . 17
B.11 Guidelines for Cleaning of Printed Boards and Assemblies (IPC-CH-65A) . 17
B.12 Handbook (IPC-J-STD-005) . 17
B.13 Acceptability of Electronic Assemblies (IPC-HDBK-610) . 18
B.14 Guidelines for Design, Selection and Application of Conformal Coatings
(IPC-HDBK-830) . 18
B.15 Solder mask Handbook (IPC-HDBK-840) . 18
B.16 Guidelines and Requirements for Electrical Testing of Unpopulated Printed
Boards (IPC-9252) . 19
B.17 In-Process DPMO and Estimated Yield for PCAs (IPC-9261A) . 19
B.18 Assembly Soldering Process Guideline for Electronic Components
(IPC-9502 PWB) . 20
B.19 Users Guide for IPC-TM-650, Method 2.6.27, Thermal Stress, Convection
Reflow Assembly Simulation (IPC-9631) . 20
B.20 High Temperature Printed Board Flatness Guideline (IPC-9641) . 20
B.21 User Guide for the IPC-TM-650, Method 2.6.25, Conductive Anodic Filament
(CAF) Resistance Test (Electrochemical Migration Testing) (IPC-9691A) . 21

IEC 61189-5-1:2016 © IEC 2016 – 3 –
B.22 Mechanical Shock Test Guidelines for Solder Joint Reliability (IPC-JEDEC-
9703) . 21
B.23 Printed Circuit Assembly Strain Gage Test Guideline (IPC-JEDEC-9704A) . 22
Bibliography . 23

Table 1 – Student’s t distribution . 11
Table A.1 – General test methods for materials and assemblies . 13

– 4 – IEC 61189-5-1:2016 © IEC 2016
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
TEST METHODS FOR ELECTRICAL MATERIALS,
PRINTED BOARDS AND OTHER INTERCONNECTION
STRUCTURES AND ASSEMBLIES –
Part 5-1: General test methods for materials and assemblies –
Guidance for printed board assemblies

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to e
...

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