CLC/SR 91 - Electronics assembly technology

IEC 61189-2-808:2024 describes the thermal transient method to characterize the thermal resistance of an assembly consisting of a heat source (e.g. power device), an attachment material (e.g. solder) and a dielectric layer with electrode. This method is suitable to determine the thermal resistance of materials and assembly methods as well as to optimize the thermal flux to a heat sink. NOTE: This method is not intended to measure and specify the value of the thermal resistance of a dielectric material. For that purpose, other standards exist. Examples are given in Annex A.

This part of IEC 61189 defines the method to be followed for the determination of the X/Y coefficient of thermal expansion of thin electrical insulating materials via the use of a thermomechanical analyser (TMA). This method is applicable to materials that are solid for the entire range of temperature used, and that retain sufficient rigidity over the temperature range so that so that irreversible indentation of the specimen by the sensing probe does not occur.

IEC 61189-2-720:2024 provides a method to evaluate specific characteristics of circuit boards by measuring the capacitance between conductor traces and a ground plane and can be used for qualitative comparison of a test specimen to a reference board. This method is not intended for quantitative measurements and for assessment of conformity to a specification.

This International Standard defines the thermal endurance test methods for reliability assessment of flexible opto-electric circuit boards. The purpose of this standard is to accommodate the uniform thermal characteristics required by the flexible opto-electric circuit in high temperature environments such as automobiles. In particular, this standard specifies a test method to inspect the occurrence of color exchange, deformation and delamination of flexible opto-electric circuit boards under thermal stress.

IEC 63215-2:2023 applies to the die attach materials and joining system applied to discrete type power electronic devices. This document specifies the temperature cycling test method which takes into account the actual usage conditions of discrete type power electronic devices to evaluate reliability of the die attach joint materials and joining system, and establishes a classification level for joining reliability (reliability performance index). The test method specified in this document is not intended to evaluate power semiconductor devices themselves. The test method specified in this document is not regarded as the one for use to guarantee the reliability of the power semiconductor device packages. NOTE The test result obtained using this document will not be used as absolute quantitative data, but for intercomparison with the other die attach materials results using the same setup.

This International Standard specifies a test method to determine the time to delamination of base materials and printed boards using a thermomechanical analyzer (TMA). Temperatures used for this evaluation are typically 260 °C, 288 °C and 300 ºC, but are not limited to these values.

This International Standard specifies a test method to determine the Z-Axis Expansion of base materials and printed boards using a thermomechanical analyser (TMA).

This International Standard specifies a test method to be followed for Thermal Performance via carbon ink heating. The method employs a screened-on pattern of carbon ink used to determine the thermal performance of a dielectric layer on a metal base plate.

IEC 61249-2-51:2023 specifies the construction, materials, property requirements, quality assurance, packaging, marking, storage of base materials for integrated circuit card carrier tape, unclad (hereinafter referred to as IC carrier tape base materials). This document is applicable to IC carrier tape base materials, which is a glue-coated material, one side is woven E-glass reinforced epoxy underlayer, and the other side is coated with adhesive and protected by release film.

This International Standard covers finished fabrics woven from ‘‘E’’ glass electrical grade glass fibre yarns that are intended as a reinforcing material in laminated plastics for electrical and electronic use. All fabrics covered by this specification are plain weave. This specification determines the nomenclature, definitions, general and chemical requirements for the glass, and physical requirements for finished woven glass fibre fabrics. Annex A of this standard provides a style designator for each finished fabric glass style, with specifications on yarn, fabric count, thickness and weight in both SI and US system.

IEC 62878-1:2019(E) specifies the generic requirements and test methods for device-embedded substrates. The basic test methods for printed board substrate materials and substrates themselves are specified in IEC 61189-3. This part of IEC 62878 is applicable to device-embedded substrates fabricated by use of organic base material, which includes, for example, active or passive devices, discrete components formed in the fabrication process of electronic printed boards, and sheet-formed components. The IEC 62878 series applies neither to the re-distribution layer (RDL) nor to electronic modules defined in IEC 62421.

IEC 62878-2-5:2019 specifies requirements based on XML schema that represents a design data format for device embedded substrate, which is a board comprising embedded active and passive devices whose electrical connections are made by means of a via, electroplating, conductive paste or printing of conductive material. This data format is to be used for simulation (e.g. stress, thermal, EMC), tooling, manufacturing, assembly, and inspection requirements. Furthermore, the data format is used for transferring information among printed board designers, printed board simulation engineer, manufacturers, and assemblers. IEC 62878-2-5:2019 applies to substrates using organic material. It neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as M-type business model in IEC 62421.

IEC 60068-2-82:2019 specifies tests for the whiskering propensity of surface finishes of electric or electronic components and mechanical parts such as punched/stamped parts (for example, jumpers, electrostatic discharge protection shields, mechanical fixations, press‑fit pins and other mechanical parts used in electronic assemblies) representing the finished stage, with tin or tin-alloy finish. Changes of the physical dimensions of mould compounds, plastics and the like during the required test flow are not considered or assessed. The test methods have been developed by using a knowledge-based approach. This edition includes the following significant technical changes with respect to the previous edition: – extension of the scope of the test standard from electronic to electromechanic components and press-fit pins, which are used for assembly and interconnect technology; – significant reduction of the testing effort by a knowledge-based selection of test conditions i.e. tests not relevant for a given materials system can be omitted (see Annex D); – harmonization with JESD 201A by omission of severities M, N for temperature cycling tests; – highly reduced test duration (1 000 h instead of 4 000 h) for damp-heat test by introducing test condition at elevated humidity of 85 % R.H. and a temperature of 85 °C providing increased severity.

IEC 61188-6-4:2019 specifies generic requirements for dimensional drawings of SMD from the viewpoint of land pattern design. The purpose of this document is to prevent land pattern design issues caused by lack of information and/or misuse of the information from SMD outline drawing as well as to improve the utilization of IEC 61188 series. This document is applicable to the SMD of semiconductor devices and electrical components.

This part of IEC 61189 establishes a method suitable for testing the softness of FCCL (Flexible Copper Clad Laminate) products and related materials. This method determines the resilience under specified conditions. The test is performed on the sample as manufactured and without conditioning. The test does not apply to the resilience force lower than 10 mN.

NEW!IEC 61191-1:2018 is available as IEC 61191-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 61191-1:2018 prescribes requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mount and related assembly technologies. This part of IEC 61191 also includes recommendations for good manufacturing processes. This edition includes the following significant technical changes with respect to the previous edition: - the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F; - the term "assembly drawing" has been changed to "assembly documentation" throughout; - references to IEC standards have been corrected; - Clause 9 was completely rewritten; - Annex B was removed because there are already procedures for circuit board assemblies.

IEC 61189-2-807:2021 specifies a test method to determine the decomposition temperature (Td) of base laminate materials using thermogravimetric analysis (TGA).

IEC 60068-2-21:2021 is applicable to all electrical and electronic components whose terminations or integral mounting devices are liable to be submitted to stresses during normal assembly or handling operations and is also applicable to surface mount devices (SMDs). This seventh edition cancels and replaces the sixth edition, published in 2006, and IEC 60068‑2‑77:1999. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition:
integration of parts of IEC 60068-2-77 (see Annex X); IEC 60068-2-77 is withdrawn with the publication of this document;
Annex X is added to show the correlation of the clauses and subclauses in this edition of IEC 60068-2-21 with the clauses in IEC 60068-2-21:2006 and IEC 60068-2-77:1999.

This International Standard describes the transportation and storage conditions for surface mounting devices (SMDs) that are fulfilled in order to enable trouble-free processing of surface mounting devices, both active and passive. (Conditions for printed boards are not taken into consideration.) The object of this standard is to ensure that users of SMDs receive and store products tha can be further processed (e.g. positioned, soldered) without prejudice to quality and reliability. Improper transportation and storage of SMDs may cause deterioration and result in assembly problems such as poor solderability, delamination and "popcorning".

IEC 62878-2-602:2021 specifies the requirements and evaluation methods of electrical connectivity. It is applicable to stacked electronic modules.

IEC 61189-2-630:2018 specifies a test method to determine the amount of water absorbed by metal-clad laminates after conditioning in a pressure vessel for 1 h, 2 h, 3 h, 4 h or 5 h.

IEC 60068-2-20:2021 is available as IEC 60068-2-20:2021 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60068-2-20:2021 outlines Tests Ta and Tb, applicable to devices with leads and leads themselves. Soldering tests for surface mounting devices (SMD) are described in IEC 60068‑2‑58. This document provides procedures for determining the solderability and resistance to soldering heat of devices in applications using solder alloys, which are eutectic or near eutectic tin lead (Pb), or lead-free alloys. The procedures in this document include the solder bath method and soldering iron method. The objective of this document is to ensure that component lead or termination solderability meets the applicable solder joint requirements of IEC 61191-3 and IEC 61191-4. In addition, test methods are provided to ensure that the component body can be resistant to the heat load to which it is exposed during soldering. This edition includes the following significant technical changes with respect to the previous edition: - update of and clarification of pre-conditioning (former "aging") and its relation to natural aging.

IEC 61189-5-301:2021 specifies methods for testing the characteristics of soldering paste using fine solder particles (hereinafter referred to as solder paste). This document is applicable to the solder paste using fine solder particle such as type 6, type 7 specified in IEC 61190-1-2 or finer particle sizes. This type of solder paste is used for connecting wiring and components in high-density printed circuit boards which are used in electronic or communication equipment and such, equipping fine wiring (e.g., minimum conductor widths and minimum conductor gaps of 60 µm or less). Test methods for the characteristics of solder paste in this document are considering the effect of surface activation force due to the fine sized solder particles which could affect the test result by existing test methods.

IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

This part of IEC 61760 gives a reference set of requirements, process conditions and related test conditions to be used when compiling specifications of electronic components that are intended for usage in through-hole reflow soldering technology. The object of this document is to ensure that components with leads intended for through-hole reflow and surface mounting components can be subjected to the same placement and mounting processes. Hereto, this document defines test and requirements that need to be part of any component generic, sectional or detail specification, when through-hole reflow soldering is intended. Furthermore, this document provides component users and manufacturers with a reference set of typical process conditions used in through-hole reflow soldering technology.

IEC 61189-5-502:2021 is used for evaluating the changes to the surface insulation resistance of a pre-selected material set on a representative test coupon and quantifies the deleterious effects of improperly used materials and processes that can lead to decreases in electrical resistance.

IEC 61188-6-2:2021 describes the requirements of design and use for soldering surfaces of land pattern on circuit boards. This document includes land pattern for surface mounted components. These requirements are based on the solder joint requirements of IEC 61191‑2:2017.

IEC 61189-5-601:2021 specifies the reflow soldering ability test method for components mounted on organic rigid printed boards, the reflow heat resistance test method for organic rigid printed boards, and the reflow soldering ability test method for the lands of organic rigid printed boards in applications using solder alloys, which are eutectic or near-eutectic tin-lead (Pb), or lead-free alloys. The printed boards materials for this organic rigid printed boards are epoxide woven E-glass laminated sheets that are specified in IEC 61249-2 (all parts). The objective of this document is to ensure the soldering ability of the solder joint and of the lands of the printed boards. In addition, test methods are provided to ensure that the printed boards can resist the heat load to which they are exposed during soldering.

IEC 61189-5-501:2021 is used to quantify the deleterious effects of flux residues on surface insulation resistance (SIR) in the presence of moisture.

IEC 61249-2-45:2018(E) gives requirements for properties of non-halogenated epoxide non‑woven reinforced core/woven E-glass reinforced surface laminate sheets of thermal conductivity and defined flammability (vertical burning test), copper-clad for lead-free assembly in thicknesses of 0,60 mm up to 1,70 mm. The flammability rating is achieved through the use of non-halogenated fire retardants reacted as part of the epoxide polymeric structure. The glass transition temperature is defined to be 105 °C minimum. Thermal conductivity is defined to be (1,0 ± 0,15) W/(m•K).

IEC 61249-2-46:2018(E) gives requirements for properties of non-halogenated epoxide non‑woven reinforced core/woven E-glass reinforced surface laminate sheets of thermal conductivity and defined flammability (vertical burning test), copper-clad for lead-free assembly in thicknesses of 0,60 mm up to 1,70 mm. The flammability rating is achieved through the use of non-halogenated fire retardants reacted as part of the epoxide polymeric structure. The glass transition temperature is defined to be 105 °C minimum. Thermal Conductivity is defined to be (1,5 ± 0,2) W/(m•K).

IEC 61249-2-47:2018(E) gives requirements for properties of non-halogenated epoxide non‑woven reinforced core/woven E-glass reinforced surface laminate sheets of thermal conductivity and defined flammability (vertical burning test), copper-clad for lead-free assembly in thicknesses of 0,60 mm up to 1,70 mm. The flammability rating is achieved through the use of non-halogenated fire retardants reacted as part of the epoxide polymeric structure. The glass transition temperature is defined to be 105 °C minimum. Thermal conductivity is defined to be (2,0 ± 0,30) W/(m•K).

IEC 61190-1-3:2017 prescribes the requirements and test methods for electronic grade solder alloys, for fluxed and non-fluxed bar, ribbon, powder solders and solder paste, for electronic soldering applications and for "special" electronic grade solders. For the generic specifications of solder alloys and fluxes, see ISO 9453. This document is a quality control document and is not intended to relate directly to the material's performance in the manufacturing process. This edition includes the following significant technical changes with respect to the previous edition: a) The maximum impurity level of Pb has been revised and the table of lead free solder alloys includes some additional lead free solder alloys.

IEC 61191-2:2017(E) gives the requirements for surface mount solder connections. The requirements pertain to those assemblies that are totally surface mounted or to the surface mounted portions of those assemblies that include other related technologies (e.g. through-hole, chip mounting, terminal mounting, etc.). This edition includes the following significant technical changes with respect to the previous edition: a) the requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F; b) some of the terminology used in the document has been updated; c) references to IEC standards have been corrected; d) five termination styles have been added.

IEC 61760-1:2020 defines requirements for component specifications of electronic components that are intended for usage in surface mounting technology. To this end, it specifies a reference set of process conditions and related test conditions to be considered when compiling component specifications. The objective of this document is to ensure that a wide variety of SMDs can be subjected to the same placement, mounting and subsequent processes (e.g. cleaning, inspection) during assembly. This document defines tests and requirements that need to be part of any SMD component's general, sectional or detail specification. In addition, this document provides component users and manufacturers with a reference set of typical process conditions used in surface mounting technology. Some of the requirements for component specifications in this document are also applicable to components with leads intended for mounting on a circuit board. Cases for which this is appropriate are indicated in the relevant subclauses. This edition includes the following significant technical changes with respect to the previous edition: a) inclusion of additional mounting methods: conductive glue bonding, sintering and solderless interconnection.

IEC 61191-4:2017(E) prescribes requirements for terminal soldered assemblies. The requirements pertain to those assemblies that are entirely terminal/wire interconnecting structures or to the terminal/wire portions of those assemblies that include other related technologies (i.e. surface mounting, through-hole mounting, chip mounting). This edition includes the following significant technical changes with respect to the previous edition: The requirements have been updated to be compliant with the acceptance criteria in IPC‑A-610F.

IEC 61191-3:2017(E) prescribes requirements for lead and hole solder assemblies. The requirements pertain to those assemblies that totally use through-hole mounting technology (THT), or the THT portions of those assemblies that include other related technologies (i.e.. surface mount, chip mounting, terminal mounting). This edition includes the following significant technical changes with respect to the previous edition: a) The requirements have been updated to be compliant wit the acceptance criteria in IPC-A-610F.

IEC 61189-5-503:2017(E) specifies the conductive anodic filament (hereafter referred to as CAF) and specifies not only the steady-state temperature and humidity test, but also a temperature-humidity cyclic test and an unsaturated pressurized vapour test (HAST).

IEC 61189-5-504:2020 is a test method designed to determine the proportion of soluble ionic residues present upon a circuit board, electronic component or assembly. The conductivity of the solution used to dissolve the ionic residues is measured to evaluate the level of ionic residues.

IEC 62090:2017(E) applies to labels on the packaging of electronic components for automatic handling in B2B processes. These labels use linear bar code and two-dimensional (2D) symbols. Labels for direct product marking and shipping labels are excluded. Labels required on the packaging of electronic components that are intended for the retail channel of distribution in B2C processes are also excluded from this document. Bar code and 2D symbol markings are used, in general, for automatic identification and automatic handling of components in electronics assembly lines. Intended applications include systems that automate the control of component packages during production, inventory and distribution. This edition includes the following significant technical changes with respect to the previous edition: a) Applicable data elements have been added. Data identifiers of those data elements are “10D”, “14D”, ”2P”, “25L”, “18V”, “V”, “J”, “3S”, “13E”, “33L” and “34L”. b) The following new informative annexes have been added: - Annex C, URL; - Annex D, Examples of data element short titles; - Annex E, Package levels for component package labels.

IEC 61188-7:2017(E) establishes a consistent technique for the description of electronic component orientation, and their land pattern geometries. This facilitates and encourages a common data capture and transfer methodology amongst and between global trading partners. This edition includes the following significant technical changes with respect to the previous edition: a) Figure 1 has been corrected; b) the term “rectangle” has generally been replaced by “polygon”; c) level B has been indicated as preferred level for new libraries.

IEC 60068-2-69:2017 outlines test Te/Tc, the solder bath wetting balance method and the solder globule wetting balance method to determine, quantitatively, the solderability of the terminations. Data obtained by these methods are not intended to be used as absolute quantitative data for pass–fail purposes. The procedures describe the solder bath wetting balance method and the solder globule wetting balance method. They are applicable to components and printed boards with metallic terminations and metallized solder pads. This document provides the measurement procedures for solder alloys both with and without lead (Pb). This edition includes the following significant technical changes with respect to the previous edition: - integration of IEC 60068-2-54; - inclusion of tests of printed boards; - inclusion of new component types, and updating test parameters for the whole component list; - inclusion of a new gauge R & R test protocol to ensure that the respective wetting balance equipment is correctly calibrated.

IEC 62739-3:2017(E) describes the selection methodology of an appropriate evaluating test method for the erosion of the metal materials without or with surface processing intended to be used for lead-free wave soldering equipment as a solder bath and other components which are in contact with the molten solder.

IEC 62739-2:2016 provides an evaluating test method for the erosion of the metallic materials with surface processing intended to be used for lead-free wave soldering equipment as a solder bath and other components which are in contact with the molten solder. It aims at prevention of an accident or a fire by predicting a setup and life of a suitable maintenance cycle.

IEC 61189-2-719:2016 specifies a test method of relative permittivity and loss tangent of printed board and assembly materials, expected to be determined 2 to 10 of relative permittivity and 0,001 to 0,050 of loss tangent at 500 MHz to 10 GHz.

IEC 61189-5-1:2016 is a catalogue of test methods representing methodologies and procedures that can be applied to test printed board assemblies. This part of IEC 61189 contains the types of content of the IEC 61189-5 series, as well as guidance documents and handbooks for printed board assemblies.