IEC TR 62240-1:2018

Process management for avionics - Electronic components capability in operation - Part 1: Temperature uprating

IEC TR 62240-1:2018 is available as IEC TR 62240-1:2018 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.
IEC TR 62240-1:2018 is a technical report, which provides information when using semiconductor devices in wider temperature ranges than those specified by the device manufacturer. The uprating solutions described herein are considered exceptions, when no reasonable alternatives are available; otherwise devices are utilized within the manufacturers’ specifications. This document describes the methods and processes for implementing this special case of thermal uprating. All of the elements of these methods and processes employ existing, commonly used best engineering practices. No new or unique engineering knowledge is needed to follow these processes, only a rigorous application of the overall approach. The terms “uprating” and “thermal uprating” are being used increasingly in avionics industry discussions and meetings, and clear definitions are included in the present IEC Technical Report. They were coined as shorthand references to a special case of methods commonly used in selecting electronic components for circuit design. This new edition cancels and replaces the first edition published in 2013 and includes a revised wording for subclause 4.1 (Introduction to selection provisions) and the associated flowchart.

General Information

• Status: Published
• Publication Date: 12-Mar-2018
• ICS: 03.100.50 - Production. Production management
• ICS: 31.020 - Electronic components in general
• ICS: 49.060 - Aerospace electric equipment and systems
• Technical Committee: TC 107 - Process management for avionics
• Current Stage: PPUB - Publication issued
• Start Date: 13-Mar-2018
• Completion Date: 13-Mar-2018

Standards Content (Sample)

IEC TR 62240-1
Edition 2.0 2018-03
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in
operation –
Part 1: Temperature uprating
IEC TR 62240-1:2018-03(en)
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IEC TR 62240-1
Edition 2.0 2018-03
TECHNICAL
REPORT
colour
inside
Process management for avionics – Electronic components capability in
operation –
Part 1: Temperature uprating
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 03.100.50; 31.020; 49.060 ISBN 978-2-8322-5364-9

Warning! Make sure that you obtained this publication from an authorized distributor.

® Registered trademark of the International Electrotechnical Commission
---------------------- Page: 3 ----------------------
– 2 – IEC TR 62240-1:2018 © IEC 2018
CONTENTS

FOREWORD ........................................................................................................................... 5

INTRODUCTION ..................................................................................................................... 7

1 Scope .............................................................................................................................. 8

2 Normative references ...................................................................................................... 8

3 Terms, definitions and abbreviated terms ........................................................................ 8

3.1 Terms and definitions .............................................................................................. 8

3.2 Abbreviated terms ................................................................................................. 12

4 Selection provisions ...................................................................................................... 12

4.1 General ................................................................................................................. 12

4.2 Device selection, usage and alternatives .............................................................. 14

4.2.1 General ......................................................................................................... 14

4.2.2 Alternatives ................................................................................................... 14

4.2.3 Device technology ......................................................................................... 14

4.2.4 Compliance with the electronic component management plan ........................ 15

4.3 Device capability assessment ............................................................................... 15

4.3.1 General ......................................................................................................... 15

4.3.2 Device package and internal construction capability assessment ................... 15

4.3.3 Risk assessment (assembly level) ................................................................. 15

4.3.4 Device uprating methods ............................................................................... 16

4.3.5 Device reliability assurance ........................................................................... 17

4.4 Device quality assurance (QA) over wider temperature ranges.............................. 18

4.4.1 Decision for the optimum QA method ............................................................. 18

4.4.2 Device level testing ....................................................................................... 19

4.4.3 Higher level assembly testing ........................................................................ 19

4.5 QA process ........................................................................................................... 19

4.5.1 General ......................................................................................................... 19

4.5.2 Semiconductor device change monitoring ...................................................... 19

4.5.3 Failure data collection and analysis ............................................................... 19

4.6 Final electronic equipment assurance ................................................................... 20

4.7 Documentation and identification .......................................................................... 20

4.7.1 Documentation .............................................................................................. 20

4.7.2 Device identification ...................................................................................... 20

4.7.3 Customer notification ..................................................................................... 20

Annex A (informative) Device parameter re-characterisation ................................................ 22

A.1 Glossary of symbols .............................................................................................. 22

A.2 Rationale for parameter re-characterisation .......................................................... 23

A.2.1 General ......................................................................................................... 23

A.2.2 Assessment for uprateability .......................................................................... 23

A.3 Capability assurance ............................................................................................. 24

A.3.1 Description .................................................................................................... 24

A.3.2 Parameter re-characterisation process .......................................................... 24

A.3.3 Application capability assessment ................................................................. 29

A.4 Quality assurance ................................................................................................. 30

A.5 Factors to be considered in parameter re-characterisation .................................... 30

A.6 Report form for documenting device parameter re-characterisation ....................... 32

Annex B (informative) Stress balancing................................................................................ 34

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IEC TR 62240-1:2018 © IEC 2018 – 3 –

B.1 General ................................................................................................................. 34

B.2 Glossary of symbols .............................................................................................. 34

B.3 Stress balancing ................................................................................................... 34

B.3.1 General ......................................................................................................... 34

B.3.2 Determine the ambient temperature extremes ................................................ 35

B.3.3 Determine parameter relationship to power dissipation .................................. 35

B.3.4 Determine the dissipated power versus ambient temperature

relationship .................................................................................................... 35

B.3.5 Assess applicability of the method ................................................................. 37

B.3.6 Determine the new parameter values ............................................................. 37

B.3.7 Conduct parametric and functional tests ........................................................ 38

B.4 Application example .............................................................................................. 38

B.4.1 General ......................................................................................................... 38

B.4.2 Determine the ambient temperature extremes ................................................ 39

B.4.3 Select the parameters that can be derated..................................................... 39

B.4.4 Construct an Iso-T plot ................................................................................. 40

B.4.5 Determine whether or not the device can be uprated ..................................... 40

B.4.6 Determine the new parameter values ............................................................. 40

B.4.7 Conduct parametric and functional tests ........................................................ 41

B.5 Other notes ........................................................................................................... 41

B.5.1 Margins ......................................................................................................... 41

B.5.2 Cautions and limitations................................................................................. 41

Annex C (informative) Parameter conformance assessment ................................................. 44

C.1 General ................................................................................................................. 44

C.2 Test plan ............................................................................................................... 44

C.2.1 General ......................................................................................................... 44

C.2.2 Critical parameters ........................................................................................ 44

C.2.3 Minimum allowable test margins .................................................................... 44

C.2.4 Test options ................................................................................................... 45

C.2.5 Quality assurance .......................................................................................... 48

Annex D (informative) Higher assembly level testing ............................................................ 51

D.1 General ................................................................................................................. 51

D.2 Process ................................................................................................................ 51

D.2.1 General ......................................................................................................... 51

D.2.2 Analysis of assembly test definition ............................................................... 51

D.2.3 Perform assembly test ................................................................................... 51

D.2.4 Document results ........................................................................................... 52

D.2.5 Maintenance notification ................................................................................ 52

Bibliography .......................................................................................................................... 54

Figure 1 – Flow chart for semiconductor devices over wider temperature ranges .................. 13

Figure 2 – Report form for documenting device usage over wider temperature ranges .......... 21

Figure A.1 – Parameter re-characterisation ........................................................................... 23

Figure A.2 – Flow diagram of parameter re-characterisation capability assurance

process ................................................................................................................................. 25

Figure A.3 – Margin in electrical parameter measurement based on the results of the

sample test ........................................................................................................................... 28

Figure A.4 – Schematic diagram of parameter limit modifications .......................................... 29

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– 4 – IEC TR 62240-1:2018 © IEC 2018

Figure A.5 – Parameter re-characterisation device quality assurance ................................... 30

Figure A.6 – Schematic of outlier products that can invalidate sample testing ....................... 31

Figure A.7 – Example of intermediate peak of an electrical parameter: Voltage

feedback input threshold change for Motorola MC34261 power factor controller, see [4] ....... 32

Figure A.8 – Report form for documenting device parameter re-characterisation ................... 33

Figure B.1 – Iso-T curve: Relationship between ambient temperature and dissipated

power ................................................................................................................................... 36

Figure B.2 – Graph of electrical parameters versus dissipated power.................................... 38

Figure B.3 – Iso-T curve for the Fairchild MM74HC244 ....................................................... 40

Figure B.4 – Power versus frequency curve for the Fairchild MM74HC244 ............................ 41

Figure B.5 – Flow chart for stress balancing ......................................................................... 42

Figure B.6 – Report form for documenting stress balancing .................................................. 43

Figure C.1 – Relationship of temperature ratings, requirements and margins ........................ 45

Figure C.2 – Typical fallout distribution versus T ...................................................... 47

req-max

Figure C.3 – Parameter conformance assessment flow ......................................................... 49

Figure C.4 – Report form for documenting parameter conformance testing ........................... 50

Figure D.1 – Flow chart of higher level assembly testing ....................................................... 52

Figure D.2 – Report form for documenting higher level assembly test at temperature

extremes ............................................................................................................................... 53

Table A.1 – Example of sample size calculation .................................................................... 26

Table A.2 – Parameter re-characterisation example: SN74ALS244 octal buffer/driver ........... 29

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IEC TR 62240-1:2018 © IEC 2018 – 5 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
PROCESS MANAGEMENT FOR AVIONICS – ELECTRONIC
COMPONENTS CAPABILITY IN OPERATION –
Part 1: Temperature uprating
FOREWORD

1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising

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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is

indispensable for the correct application of this publication.

9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of

patent rights. IEC shall not be held responsible for identifying any or all such patent rights.

The main task of IEC technical committees is to prepare International Standards. However, a

technical committee may propose the publication of a technical report when it has collected

data of a different kind from that which is normally published as an International Standard, for

example "state of the art".

IEC TR 62240-1, which is a Technical Report, has been prepared by IEC technical committee

107: Process management for avionics.

This second edition cancels and replaces the first edition published in 2013. This edition

constitutes a technical revision. This edition includes the following significant technical

changes with respect to the previous edition:

a) Revised the wording in 4.1 and the corresponding Figure 1 to reflect current industry

practices.
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– 6 – IEC TR 62240-1:2018 © IEC 2018
The text of this Technical Report is based on the following documents:
CDTR Report on voting
107/313/DTR 107/322/RVDTR

Full information on the voting for the approval of this Technical Report can be found in the

report on voting indicated in the above table.

This document has been drafted in accordance with the ISO/IEC Directives, Part 2.

A list of all parts in the IEC 62240 series, published under the general title Process

management for avionics – Electronic components capability in operation, can be found on

the IEC website.

The committee has decided that the contents of this document will remain unchanged until the

stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to

the specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

IMPORTANT – The 'colour inside' logo on the cover page of this publication indicates

that it contains colours which are considered to be useful for the correct

understanding of its contents. Users should therefore print this document using a

colour printer.
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IEC TR 62240-1:2018 © IEC 2018 – 7 –
INTRODUCTION

Traditionally, industries that produced electronic equipment for ADHP (aerospace, defence

and high performance) applications have relied on the military specification system for

semiconductor device standards and upon manufacturers of military-specified devices as

device sources. This assured the availability of semiconductor devices specified to operate

over the temperature ranges required for electronic equipment in ADHP applications. In the

past, several device manufacturers have exited the military market, resulting in the decreased

availability of devices specified to operate over wide temperature ranges. Following are some

typical ambient temperature ranges at which devices are marketed:
Military:
–55 °C to + 125 °C
Automotive:
–40 °C to + 125 °C
Industrial:
–40 °C to + 85 °C
Commercial:
0 °C to + 70 °C

If there are no reasonable or practical alternatives, then a potential response is for electronic

equipment manufacturers to use devices at temperature ranges that are wider than those

specified by the device manufacturer.

This document provides information on selecting semiconductor devices, assessing their

capability to operate, and assuring their intended quality in the wider temperature ranges. It

also reports the need for documentation of such usage.

This can be supported by exchanging technical information with the original device

manufacturer.

Operation of the device beyond the manufacturer’s limits can result normally in loss of

warranty by the device manufacturer.
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– 8 – IEC TR 62240-1:2018 © IEC 2018
PROCESS MANAGEMENT FOR AVIONICS – ELECTRONIC
COMPONENTS CAPABILITY IN OPERATION –
Part 1: Temperature uprating
1 Scope

This part of IEC 62240, which is a technical report, provides information when using

semiconductor devices in wider temperature ranges than those specified by the device

manufacturer. The uprating solutions described herein are considered exceptions, when no

reasonable alternatives are available; otherwise devices are utilized within the manufacturers’

specifications.

The terms “uprating” and “thermal uprating” are being used increasingly in avionics industry

discussions and meetings, and clear definitions are included in Clause 3. They were coined

as shorthand references to a special case of methods commonly used in selecting electronic

components for circuit design.

This document describes the methods and processes for implementing this special case of

thermal uprating. All of the elements of these methods and processes employ existing,

commonly used best engineering practices. No new or unique engineering knowledge is

needed to follow these processes, only a rigorous application of the overall approach.

Even though the device is used at wider temperatures, the wider temperatures usage will be

limited to those that do not compromise applications performance and reliability, particularly

for devices with narrow feature size geometries (for example, 90 nm and less). This document

does not imply that applications use the device to function beyond the absolute maximum

rating limits specified by the original device manufacturer and assumes that:

– device usage outside the original device manufacturers’ specified temperature ranges is

done only when no reasonable alternative approach is available and is performed with

appropriate justification;

– if it is necessary to use devices outside the original device manufacturers’ specified

temperature ranges, it is done with documented and controlled processes that assure

integrity of the electronic equipment.
2 Normative references

The following documents are referred to in the text in such a way that some or all of their

content constitutes requirements of this document. For dated references, only the edition

cited applies. For undated references, the latest edition of the referenced document (including

any amendments) applies.

IEC TS 62239-1, Process management for avionics – Management plan – Part 1: Preparation

and maintenance of an electronic components management plan
3 Terms, definitions and abbreviated terms
3.1 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
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IEC TR 62240-1:2018 © IEC 2018 – 9 –

ISO and IEC maintain terminological databases for use in standardization at the following

addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1.1
absolute maximum ratings

limiting values of operating and environmental conditions applicable to any semiconductor

device of a specific type as defined by its published specification data, which should not be

exceeded under the worst possible conditions
[SOURCE: IEC 60134:1961, Clause 4]
3.1.2
ambient temperature
temperature of the environment in which a semiconductor device is operating
3.1.3
case temperature
temperature of the surface of a semiconductor device package during operation
3.1.4
circuit element functional mode analysis

documented analysis that determines minimum ranges and maximums of all functional

characteristics of the assembly with respect to the related functional parameters of devices

being uprated
3.1.5
COTS product
commercial off-the-shelf product

one or more components, assembled and developed for multiple commercial consumers,

whose design and/or configuration is controlled by the manufacturer’s specification or industry

standard

Note 1 to entry: COTS products can include electronic components, subassemblies or assemblies, or top level

assemblies. Electronic COTS subassemblies or assemblies include circuit card assemblies, power supplies, hard

drives, and memory modules. Top-level COTS assemblies include a fully integrated rack of equipment such as raid

arrays, file servers to individual switches, routers, personal computers, or similar equipment.

[SOURCE: IEC TS 62668-1:2016, 3.1.3]
3.1.6
device capability assessment

process of demonstrating that the device design is capable of providing the specified

functionality and operation over the wider temperature range, for the required length of time

Note 1 to entry: It assumes that the device has been qualified to operate within its specified temperature range,

and includes additional testing or analysis to evaluate expected performance at the wider temperature range.

Device capability assessment includes both performance and application-specific reliability.

3.1.7
device quality assurance over the wider temperature range

additional testing or analysis required to assure that each individual device is capable of

operating successfully in the required wider temperature range
3.1.8
device
component

material element or assembly of such elements intended to perform a required function

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– 10 – IEC TR 62240-1:2018 © IEC 2018
Note 1 to entry: A device may form part of a larger device.
[SOURCE: IEC 60050-151:2001, 151-11-20, modified – The term "component" has been
added as a synonym to "device".]
3.1.8.1
semiconductor device
electrical or e
...