WG 7 - TC 47/SC 47A/WG 7

IEC 63011-2:2018 provides specifications of initial alignment and alignment maintenance between multiple stacked integrated circuits during the die bonding process. These specifications define the alignment keys and operating procedures of the keys. These specifications apply only if electrical coupling method of die-to-die alignment is used in the die stacking.

IEC 63011-3:2018 specifies a reference model of through-silicon via (TSV) electrical characteristics required for an interface design in three dimensional integrated circuit (3-D IC) to transmit and receive digital data and measurement conditions for resistance and capacitance to specify TSV characteristics in 3-D IC.
Power devices, RF devices and micro-electromechanical systems (MEMS) are not in the scope of this document.

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.

Applies to high quality hybrids (with films) incorporating special customer quality and reliability requirements whose quality is assessed on the basis of Qualification Approval. NOTE: Hybrid integrated circuits may be fully or part completed.

Applies to high quality approval systems for hybrid integrated circuits and film structures. The purpose of the tests is to perform visual inspections on the internal materials, construction and workmanship of hybrid, multichip and multichip module microcircuits and passive elements used for microelectronic applications including r.f./microwave. These tests will normally be used on microelectronic devices prior to capping or encapsulation to detect and eliminate devices with internal non-conformances that could lead to device failure in normal application. They may also be employed on a sampling basis to determine the effectiveness of the manufacturers' quality control and handling procedures.

Serves as a Blank Detail Specification for a high quality approval system and contains requirements for style and layout and minimum content of detail specifications. These requirements are applicable when the detail specification is published.

Applies to a high quality approval system for hybrid integrated circuits and film structures.This checklist is intended for the use of a hybrid microcircuit manufacturer's internal assessment team. It will provide the hybrid manufacturer and the National Supervising Inspectorate with ongoing information on process control demonstrating compliance with IEC 60748-23-1.

Applies to high quality hybrid integrated circuits (with films) incorporating special customer quality and reliability requirements. Hybrid integrated circuits may be fully or partly completed. Partly completed devices are those that may be supplied to customers for further processing.

Constitutes the general part of IEC 60748. Together with the relevant material of IEC 60747-1, it gives general information on integrated circuits.