EMC IC modelling - Part 4: Models of Integrated Circuits for RF Immunity behavioural simulation - Conducted Immunity modelling (ICIM-CI) (IEC 62433-4:2016)

This part of IEC 62433 specifies a flow for deriving a macro-model to allow the simulation of
the conducted immunity levels of an integrated circuit (IC). This model is commonly called
Integrated Circuit Immunity Model – Conducted Immunity, ICIM-CI. It is intended to be used
for predicting the levels of immunity to conducted RF disturbances applied on IC pins.
In order to evaluate the immunity threshold of an electronic device, this macro-model will be
inserted in an electrical circuit simulation tool.
This macro-model can be used to model both analogue and digital ICs (input/output, digital
core and supply). This macro-model does not take into account the non-linear effects of the IC.
The added value of ICIM-CI is that it could also be used for immunity prediction at board and
system level through simulations.
This part of IEC 62433 has two main parts:
• the electrical description of ICIM-CI macro-model elements;
• a universal data exchange format called CIML based on XML. This format allows ICIM-CI
to be encoded in a more useable and generic form for immunity simulation.

EMV-IC-Modellierung - Teil 4: Modelle integrierter Schaltungen für die Simulation des Verhaltens der HF-Störfestigkeit - Modellierung der Störfestigkeit gegen leitungsgeführte Störungen (ICIM-CI)

EMC IC modelling - Part 2: Models of Integrated Circuits for EMI behavioural simulation - Conducted Emissions modelling (ICEM-CE) (IEC 62433-4:2016)

L'IEC 62433-4:2016 spécifie un macromodèle de simulation des niveaux d'immunité conduite d'un circuit intégré (CI). Ce modèle est communément appelé Modèle d'immunité de circuits intégrés - Immunité conduite (ICIM-CI - Integrated Circuit Immunity Model - Conducted Immunity). Il est destiné à prévoir les niveaux d'immunité aux perturbations radioélectriques conduites appliqués aux broches de circuits intégrés. Afin d'évaluer le seuil d'immunité d'un dispositif électronique, ce macromodèle est inséré dans un outil de simulation de circuit électrique. Ce macromodèle peut être utilisé pour modéliser les circuits intégrés analogiques et numériques (entrée/sortie, noyau numérique et alimentation). Ce macromodèle ne tient pas compte des effets non linéaires du circuit intégré.
L'ICIM-CI présente l'avantage de pouvoir également être utilisé pour la prévision d'immunité au niveau de la carte et du système grâce à des simulations. La présente partie de l'IEC 62433 est composée de deux parties principales:
- la description électrique des éléments du macromodèle ICIM-CI;
- un format universel d'échange de données appelé CIML et reposant sur le langage XML. Ce format permet de coder l'ICIM-CI sous une forme plus utile et générique pour la simulation d'immunité.

Modeliranje integriranih vezij (IC) za elektromagnetno združljivost (EMC) - 4. del: Modeli integriranih vezij za vedenjsko simulacijo RF odpornosti - Modeliranje odpornosti integriranih vezij proti prevajanim motnjam (ICIM-CI) (IEC 62433-4:2016)

Ta del standarda IEC 62433 določa potek za izpeljavo makro modela, ki omogoča simulacijo ravni odpornosti integriranega vezja (IC) proti prevajanim motnjam. Ta model običajno imenujemo model odpornosti integriranih vezij – odpornost proti prevajanim motnjam, ICIM-CI. Uporablja se za napovedovanje ravni odpornosti na prevajane motnje RF, ki se pojavijo na kontaktih integriranih vezij.
Ta makro model bo vstavljen v orodje za simulacijo električnega tokokroga za ocenjevanje praga odpornosti elektronske naprave.
Ta makro model se lahko uporablja za analogna in digitalna integrirana vezja (vhod/izhod, digitalno jedro in napajanje). Ta makro model ne upošteva nelinearnih učinkov integriranega vezja.
Dodana vrednost modela ICIM-CI je, da se na podlagi simulacij lahko uporablja tudi za napovedovanje odpornosti plošče in sistema.
Ta del standarda IEC 62433 ima dva glavna dela:
• električni opis elementov makro modela ICIM-CI:
• univerzalni format za izmenjavo CIML, ki temelji na formatu XML. Ta format omogoča, da se model ICIM-CI kodira v uporabnejši in splošnejši obliki za simulacijo odpornosti.

General Information

Status
Published
Publication Date
06-Nov-2016
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
26-Oct-2016
Due Date
31-Dec-2016
Completion Date
07-Nov-2016

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2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.Modeliranje integriranih vezij (IC) za elektromagnetno združljivost (EMC) - 4. del: Modeli integriranih vezij za vedenjsko simulacijo RF odpornosti - Modeliranje odpornosti integriranih vezij proti prevajanim motnjam (ICIM-CI) (IEC 62433-4:2016)EMC IC modelling - Part 2: Models of Integrated Circuits for EMI behavioural simulation - Conducted Emissions modelling (ICEM-CE) (IEC 62433-4:2016)EMC IC modelling - Part 4: Models of Integrated Circuits for RF Immunity behavioural simulation - Conducted Immunity modelling (ICIM-CI) (IEC 62433-4:2016)33.100.20ImunostImmunity31.200Integrirana vezja, mikroelektronikaIntegrated circuits. MicroelectronicsICS:Ta slovenski standard je istoveten z:EN 62433-4:2016SIST EN 62433-4:2016en01-december-2016SIST EN 62433-4:2016SLOVENSKI
STANDARD



SIST EN 62433-4:2016



EUROPEAN STANDARD NORME EUROPÉENNE EUROPÄISCHE NORM
EN 62433-4
October 2016 ICS 31.200
English Version
EMC IC modelling - Part 4: Models of integrated circuits for RF immunity behavioural simulation - Conducted immunity modelling (ICIM-CI) (IEC 62433-4:2016)
Modèles de circuits intégrés pour la CEM -
Partie 4: Modèles de circuits intégrés pour la simulation du comportement d'immunité aux radiofréquences - Modélisation de l'immunité conduite (ICIM-CI) (IEC 62433-4:2016)
EMV-IC-Modellierung - Teil 4: Modelle integrierter Schaltungen für die Simulation des Verhaltens der HF-Störfestigkeit - Modellierung der Störfestigkeit gegen leitungsgeführte Störungen (ICIM-CI) (IEC 62433-4:2016) This European Standard was approved by CENELEC on 2016-06-29. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom. European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique Europäisches Komitee für Elektrotechnische Normung CEN-CENELEC Management Centre: Avenue Marnix 17,
B-1000 Brussels © 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 62433-4:2016 E SIST EN 62433-4:2016



EN 62433-4:2016 2 European foreword The text of document 47A/988/FDIS, future edition 1 of IEC 62433-4, prepared by SC 47A “Integrated circuits” of IEC/TC 47 “Semiconductor devices” was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as EN 62433-4:2016.
The following dates are fixed: • latest date by which the document has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2017-04-21 • latest date by which the national standards conflicting with the document have to be withdrawn (dow) 2019-10-21
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such patent rights.
Endorsement notice The text of the International Standard IEC 62433-4:2016 was approved by CENELEC as a European Standard without any modification. SIST EN 62433-4:2016



EN 62433-4:2016 3 Annex ZA (normative)
Normative references to international publications with their corresponding European publications
The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here: www.cenelec.eu
Publication Year Title EN/HD Year
IEC 62132-1 -
Circuits intégrés - Mesure de l'immunité électromagnétique -
Partie 1: Conditions générales et définitions EN 62132-1 -
IEC 62132-4 -
Circuits intégrés - Mesure de l'immunité électromagnétique 150 kHz à 1 GHz - Partie 4: Méthode d'injection directe de puissance RF EN 62132-4 -
IEC 62433-2 -
Modèles de circuits intégrés pour la CEM - Partie 2: Modèles de circuits intégrés pour la simulation du comportement lors de perturbations électromagnétiques - Modélisation des émissions conduites (ICEM-CE) EN 62433-2 -
ISO 8879 1986 Traitement de l'information - Systèmes bureautiques - Langage normalisé de balisage généralisé (SGML) - -
ISO/IEC 646 1991 Technologies de l'information - Jeu ISO de caractères codés à 7 éléments pour l'échange d'information - -
CISPR 17 -
Méthodes de mesure des caractéristiques d'antiparasitage des dispositifs de filtrage CEM passifs EN 55017 -
SIST EN 62433-4:2016



SIST EN 62433-4:2016



IEC 62433-4 Edition 1.0 2016-05 INTERNATIONAL STANDARD NORME INTERNATIONALE EMC IC modelling –
Part 4: Models of integrated circuits for RF immunity behavioural simulation – Conducted immunity modelling (ICIM-CI)
Modèles de circuits intégrés pour la CEM –
Partie 4: Modèles de circuits intégrés pour la simulation du comportement d’immunité aux radiofréquences – Modélisation de l'immunité conduite (ICIM-CI)
INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE
ICS 31.200
ISBN 978-2-8322-3417-4
® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale ®
Warning! Make sure that you obtained this publication from an authorized distributor.
Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé. SIST EN 62433-4:2016 colourinside



– 2 – IEC 62433-4:2016 © IEC 2016 CONTENTS FOREWORD . 7 1 Scope . 9 2 Normative references. 9 3 Terms, definitions, abbreviations and conventions . 10 3.1 Terms and definitions . 10 3.2 Abbreviations . 11 3.3 Conventions . 11 4 Philosophy . 12 5 ICIM-CI model description . 12 5.1 General . 12 5.2 PDN description . 14 5.3 IBC description . 15 5.4 IB description . 16 6 CIML format . 17 6.1 General . 17 6.2 CIML structure . 18 6.3 Global keywords . 19 6.4 Header section . 19 6.5 Lead definitions . 20 6.6 SPICE macro-models . 21 6.7 Validity section . 23 6.7.1 General . 23 6.7.2 Attribute definitions . 23 6.8 PDN . 25 6.8.1 General . 25 6.8.2 Attribute definitions . 26 6.8.3 PDN for a single-ended input or output . 29 6.8.4 PDN for a differential input . 36 6.8.5 PDN multi-port description. 39 6.9 IBC . 40 6.9.1 General . 40 6.9.2 Attribute definitions . 41 6.10 IB . 42 6.10.1 General . 42 6.10.2 Attribute definitions . 43 6.10.3 Description . 48 7 Extraction . 50 7.1 General . 50 7.2 Environmental extraction constraints . 50 7.3 PDN extraction . 51 7.3.1 General . 51 7.3.2 S-/Z-/Y-parameter measurement . 51 7.3.3 RFIP technique . 51 7.4 IB extraction. 52 7.4.1 General . 52 7.4.2 Direct RF power injection test method . 52 SIST EN 62433-4:2016



IEC 62433-4:2016 © IEC 2016 – 3 –
7.4.3 RF Injection probe test method . 54 7.4.4 IB data table . 55 7.5 IBC . 56 8 Validation of ICIM-CI hypotheses . 56 8.1 General . 56 8.2 Linearity . 57 8.3 Immunity criteria versus transmitted power . 58 9 Model usage . 59 Annex A (normative)
Preliminary definitions for XML representation . 61 A.1 XML basics . 61 A.1.1 XML declaration . 61 A.1.2 Basic elements . 61 A.1.3 Root element . 61 A.1.4 Comments . 62 A.1.5 Line terminations . 62 A.1.6 Element hierarchy . 62 A.1.7 Element attributes . 62 A.2 Keyword requirements . 62 A.2.1 General . 62 A.2.2 Keyword characters . 63 A.2.3 Keyword syntax . 63 A.2.4 File structure . 63 A.2.5 Values . 65 Annex B (informative)
ICIM-CI example with disturbance load . 68 Annex C (informative)
Conversions between parameter types . 69 C.1 General . 69 C.2 Single-ended input or output . 69 C.3 Differential input or output . 70 Annex D (informative)
Example of ICIM-CI macro-model in CIML format . 74 Annex E (normative)
CIML Valid keywords and usage . 79 E.1 Root element keywords . 79 E.2 File header keywords . 79 E.3 Validity section keywords . 81 E.4 Global keywords . 81 E.5 Lead keyword . 82 E.6 Lead_definitions section attributes . 82 E.7 Macromodels section attributes . 83 E.8 Pdn section keywords . 84 E.8.1 Lead element keywords . 84 E.8.2 Netlist section keywords . 86 E.9 Ibc section keywords . 87 E.9.1 Lead element keywords . 87 E.9.2 Netlist section keywords . 89 E.10 Ib section keywords . 89 E.10.1 Lead element keywords . 89 E.10.2 Max_power_level section keywords . 91 E.10.3 Voltage section keywords . 91 E.10.4 Current section keywords . 93 SIST EN 62433-4:2016



– 4 – IEC 62433-4:2016 © IEC 2016 E.10.5 Power section keywords . 94 E.10.6 Test_criteria section keywords . 95 Annex F (informative)
PDN impedance measurement methods
using vector network analyzer . 97 F.1 General . 97 F.2 Conventional one-port method . 97 F.3 Two-port method for low impedance measurement . 97 F.4 Two-port method for high impedance measurement . 98 Annex G (informative)
RFIP measurement method description . 99 G.1 General . 99 G.2 Obtaining immunity parameters . 99 Annex H (informative)
Immunity simulation with ICIM model based on pass/fail test . 101 H.1 ICIM-CI macro-model of a voltage regulator IC . 101 H.1.1 General . 101 H.1.2 PDN extraction . 101 H.1.3 IB extraction . 101 H.1.4 SPICE-compatible macro-model . 102 H.2 Application level simulation and failure prediction . 102 Annex I (informative)
Immunity simulation with ICIM model based on non pass/fail test . 104 Bibliography . 106
Figure 1 – Example of ICIM-CI model structure . 13 Figure 2 – Example of an ICIM-CI model of an electronic board . 14 Figure 3 – Example of an IBC network . 16 Figure 4 – ICIM-CI model representation with different blocks . 16 Figure 5 – CIML inheritance hierarchy . 18 Figure 6 – Example of a netlist file defining a sub-circuit . 22 Figure 7 – PDN electrical schematics . 29 Figure 8 – PDN represented as a one-port black-box . 29 Figure 9 – PDN represented as S-parameters in Touchstone format . 32 Figure 10 – PDN represented as two-port S-parameters in Touchstone format . 33 Figure 11 – Example structure for defining the PDN using circuit elements . 34 Figure 12 – Example of a single-ended PDN Netlist main circuit definition . 35 Figure 13 – Example of a single-ended PDN Netlist
with both sub-circuit
and main circuit definitions . 35 Figure 14 – Differential input schematic . 37 Figure 15 – PDN represented as a two-port black-box . 37 Figure 16 – PDN data format for differential input or output . 37 Figure 17 – Differential inputs of an operational amplifier example . 39 Figure 18 – ICIM-CI Model for a 74HC08 component . 40 Figure 19 – Example IB file obtained from DPI measurement . 50 Figure 20 – Test setup of the DPI immunity measurement method
as specified in IEC 62132-4 . 52 Figure 21 – Principle of single and multi-pin DPI . 53 Figure 22 – Electrical representation of the DPI test setup . 54 Figure 23 – Test setup of the RFIP measurement method derived from the DPI method . 55 SIST EN 62433-4:2016



IEC 62433-4:2016 © IEC 2016 – 5 –
Figure 24 – Example setup used for illustrating ICIM-CI hypotheses . 57 Figure 25 – Example of linearity assumption validation . 58 Figure 26 – Example of transmitted power criterion validation . 59 Figure 27 – Use of the ICIM-CI macro-model for simulation . 59 Figure A.1 – Multiple XML (CIML) files . 64 Figure A.2 – XML files with data files (*.dat) . 64 Figure A.3 – XML files with additional files . 65 Figure B.1 – ICIM-CI description applied to an oscillator stage for extracting IB. 68 Figure C.1 – Single-ended DI . 69 Figure C.2 – Differential DI . 70 Figure C.3 – Two-port representation of a differential DI . 70 Figure C.4 – Simulation of common-mode injection on a differential DI based on DPI . 72 Figure C.5 – Equivalent common-mode input impedance of a differential DI . 72 Figure C.6 – Determination of transmitted power for a differential DI . 72 Figure D.1 – Test setup on an example LIN transceiver . 74 Figure D.2 – PDN data in touchstone format (s2p), data measured using VNA . 76 Figure D.3 – PDN data of leads 6 (LIN) and 7 (VCC) . 77 Figure D.4 – IB data in ASCII format (.txt), data measured
using DPI method – Injection on VCC pin . 77 Figure D.5 – IB data for injection on VCC pin . 78 Figure F.1 – Conventional one-port S-parameter measurement . 97 Figure F.2 – Two-port method for low impedance measurement . 98 Figure F.3 – Two-port method for high impedance measurement. 98 Figure G.1 – Test setup of the RFIP measurement method derived from DPI method . 99 Figure G.2 – Principle of the RFIP measurement method . 99 Figure H.1 – Electrical schematic for extracting
the voltage regulator’s ICIM-CI . 101 Figure H.2 – ICIM-CI extraction on the voltage regulator example . 102 Figure H.3 – Example of a SPICE-compatible ICIM-CI
macro-model of the voltage regulator . 102 Figure H.4 – Example of a board level simulation on the voltage regulator’s
ICIM-CI with PCB model and other components including parasitic elements . 103 Figure H.5 – Incident power as a function of frequency
that is required to create a defect with a 10 nF filter . 103 Figure I.1 – Example of an IB file for a given failure criterion . 104 Figure I.2 – Comparison of simulated transmitted power
and measured immunity behaviour . 105
Table 1 – Attributes of Lead keyword in the Lead_definitions section . 20 Table 2 – Compatibility between the Mode and Type fields for correct CIML annotation . 20 Table 3 – Subckt definition . 21 Table 4 – Definition of the Validity section . 23 Table 5 – Definition of the Lead keyword for Pdn section . 25 Table 6 – Valid data formats and their default units in the Pdn section . 28 Table 7 – Valid file extensions in the Pdn section . 28 Table 8 – Valid fields of the Lead keyword for single-ended PDN . 30 SIST EN 62433-4:2016



– 6 – IEC 62433-4:2016 © IEC 2016 Table 9 – Netlist definition. 34 Table 10 – Valid fields of the Lead keyword for differential PDN . 38 Table 11 – Differences between the Pdn and Ibc section fields . 41 Table 12 – Valid fields of the Lead keyword for IBC definition . 42 Table 13 – Definition of the Lead keyword in Ib section . 43 Table 14 – Max_power_level definition . 44 Table 15 – Voltage, Current and Power definition . 45 Table 16 – Test_criteria definition . 45 Table 17 – Default values of Unit_voltage, Unit_current and Unit_power tags
as a function of data format . 48 Table 18 – Valid file extensions in the Ib section . 48 Table 19 – Example of IB table pass/fail criteria . 56 Table A.1 – Valid logarithmic units . 66 Table C.1 – Single-ended parameter conversion . 70 Table C.2 – Differential parameter conversion . 71 Table C.3 – Power calculation . 73 Table E.1 – Root element keywords .
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