SIST EN IEC 63378-3:2025
(Main)Thermal standardization on semiconductor packages - Part 3: Thermal circuit simulation models of discrete semiconductor packages for transient analysis (IEC 63378-3:2025)
Thermal standardization on semiconductor packages - Part 3: Thermal circuit simulation models of discrete semiconductor packages for transient analysis (IEC 63378-3:2025)
IEC 63378-3:2025 specifies the thermal circuit network model of discrete (TO‑243, TO‑252 and TO‑263) packages, which is used in the transient analysis of electronic devices to estimate precise junction temperatures without experimental verification.
This model is intended to be made and provided by semiconductor suppliers and to be used by assembly makers of electronic devices.
Thermische Standardisierung von Halbleitergehäusen - Teil 3: Thermische Schaltungssimulationsmodelle von diskreten Halbleitergehäusen für die Transientenanalyse (IEC 63378-3:2025)
Normalisation thermique des boîtiers de semiconducteurs - Partie 3: Modèles de simulation de circuits thermiques de boîtiers de semiconducteurs discrets pour analyse transitoire (IEC 63378-3:2025)
L’IEC 63378-3:2025 spécifie le modèle de réseau de circuits thermiques des boîtiers discrets (TO‑243, TO‑252 et TO‑263), qui est utilisé dans l’analyse transitoire des dispositifs électroniques pour estimer avec précision les températures de jonction sans vérification expérimentale.
Ce modèle est destiné à être fabriqué et fourni par les fournisseurs de semiconducteurs, et à être utilisé par les assembleurs de dispositifs électroniques.
Standardizacija toplotnih lastnosti pri polprevodniških ohišjih - 3. del: Simulacijski modeli toplotnih vezij diskretnih polprevodniških ohišij za prehodno analizo (IEC 63378-3:2025)
General Information
Standards Content (Sample)
SLOVENSKI STANDARD
01-september-2025
Standardizacija toplotnih lastnosti pri polprevodniških ohišjih - 3. del: Simulacijski
modeli toplotnih vezij diskretnih polprevodniških ohišij za prehodno analizo (IEC
63378-3:2025)
Thermal standardization on semiconductor packages - Part 3: Thermal circuit simulation
models of discrete semiconductor packages for transient analysis (IEC 63378-3:2025)
Thermische Standardisierung von Halbleitergehäusen - Teil 3: Thermische
Schaltungssimulationsmodelle von diskreten Halbleitergehäusen für die
Transientenanalyse (IEC 63378-3:2025)
Normalisation thermique des boîtiers de semiconducteurs - Partie 3: Modèles de
simulation de circuits thermiques de boîtiers de semiconducteurs discrets pour analyse
transitoire (IEC 63378-3:2025)
Ta slovenski standard je istoveten z: EN IEC 63378-3:2025
ICS:
31.080.01 Polprevodniški elementi Semiconductor devices in
(naprave) na splošno general
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
EUROPEAN STANDARD EN IEC 63378-3
NORME EUROPÉENNE
EUROPÄISCHE NORM June 2025
ICS 31.080.01
English Version
Thermal standardization on semiconductor packages - Part 3:
Thermal circuit simulation models of discrete semiconductor
packages for transient analysis
(IEC 63378-3:2025)
Normalisation thermique des boîtiers de semiconducteurs - Thermische Standardisierung von Halbleitergehäusen - Teil
Partie 3: Modèles de simulation de circuits thermiques de 3: Thermische Schaltungssimulationsmodelle von diskreten
boîtiers de semiconducteurs discrets pour analyse Halbleitergehäusen für die Transientenanalyse
transitoire (IEC 63378-3:2025)
(IEC 63378-3:2025)
This European Standard was approved by CENELEC on 2025-06-10. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
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© 2025 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 63378-3:2025 E
European foreword
The text of document 47D/967/CDV, future edition 1 of IEC 63378-3, prepared by SC 47D
"Semiconductor devices packaging" of IEC/TC 47 "Semiconductor devices" was submitted to the IEC-
CENELEC parallel vote and approved by CENELEC as EN IEC 63378-3:2025.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2026-06-30
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2028-06-30
document have to be withdrawn
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Any feedback and questions on this document should be directed to the users’ national committee. A
complete listing of these bodies can be found on the CENELEC website.
Endorsement notice
The text of the International Standard IEC 63378-3:2025 was approved by CENELEC as a European
Standard without any modification.
IEC 63378-3 ®
Edition 1.0 2025-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Thermal standardization on semiconductor packages –
Part 3: Thermal circuit simulation models of discrete semiconductor packages
for transient analysis
Normalisation thermique des boîtiers de semiconducteurs –
Partie 3: Modèles de simulation de circuits thermiques de boîtiers de
semiconducteurs discrets pour analyse transitoire
ICS 31.080.01 ISBN 978-2-8327-0399-1
IEC 63378-3:2025-05(en-fr)
– 2 – IEC 63378-3:2025 © IEC 2025
CONTENTS
FOREWORD . 3
1 Scope . 5
2 Normative references . 5
3 Terms and definitions . 5
4 Procedure of thermal circuit network model . 6
4.1 General . 6
4.2 Detailed model analysis . 6
4.3 Delphi model preparation . 9
4.4 Thermal circuit model topology . 9
4.5 Determination of thermal capacitance values . 10
Annex A (normative) Validation for TO-252 case . 13
A.1 General . 13
A.2 Simulation parameters . 13
A.3 Comparison of detailed thermal model versus D2elphi model . 13
Bibliography . 15
Figure 1 – Two-resistor model. 6
Figure 2 – Delphi model . 6
Figure 3 – Detailed model (example) . 7
Figure 4 – PCB model . 8
Figure 5 – Simulation volume . 8
Figure 6 – Topology . 10
Figure A.1 – Heatsink model . 13
Table 1 – Dimensions and material properties of detailed model (Example) . 7
Table 2 – Dimensions and material properties of PCB model . 8
Table 3 – Thermal capacitance of the portions (Example) . 10
Table 4 – Thermal capacitance assignment . 11
Table 5 – The combination of α, β, γ (example) . 11
Table A.1 – Comparison with detailed thermal model and D2elphi model . 14
IEC 63378-3:2025 © IEC 2025 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
THERMAL STANDARDIZATION ON SEMICONDUCTOR PACKAGES –
Part 3: Thermal circuit simulation models of discrete
semiconductor packages for transient analysis
FOREWORD
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co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) IEC draws attention to the possibility that the implementation of this document may involve the use of (a)
patent(s). IEC takes no position concerning the evidence, validity or applicability of any claimed patent rights in
respect thereof. As of the date of publication of this document, IEC had not received notice of (a) patent(s), which
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shall not be held responsible for identifying any or all such patent rights.
IEC 63378-3 has been prepared by subcommittee 47D: Semiconductor devices packaging, of
IEC technical committee 47: Semiconductor devices. It is an International Standard.
The text of this International Standard is based on the following documents:
Draft Report on voting
47D/967/CDV 47D/979/RVC
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
– 4 – IEC 63378-3:2025 © IEC 2025
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC 63378 series, published under the general title Thermal
standardization on semiconductor packages, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn, or
• revised.
IEC 63378-3:2025 © IEC 2025 – 5 –
THERMAL STANDARDIZATION ON SEMICONDUCTOR PACKAGES –
Part 3: Thermal circuit simulation models of discrete
semiconductor packages for transient analysis
1 Scope
This part of IEC 63378 specifies the thermal circuit network model of discrete (TO-243, TO-252
and TO-263) packages, which is used in the transient analysis of electronic devices to estimate
precise junction temperatures without experimental verification.
This model is intended to be made and provided by semiconductor suppliers and to be used by
assembly makers of electronic devices.
2 Normative references
There are no normative
...
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