ASTM F523-93(1997)

Standard Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces

SCOPE
1.1 This practice covers an inspection procedure for determining the surface quality of silicon wafers that have been polished on one side.  
1.2 This practice is intended as a large-volume acceptance method and as such does not require use of a microscope or other optical instruments. Because the inspection relies on the visual acuity of the operator, test results may be very operator-sensitive.  Note 1-For clarification of the identification of certain observed defects, procedures given in Practices F154 may be employed.
1.3 Defects visible to the unaided eye on polished wafer surfaces are categorized in three groups by the illumination geometry which best delineates them: front-surface high-intensity light, front-surface diffuse light, and back-surface diffuse light. These defects originate from two sources: (1) those which are caused by imperfections in the silicon crystal, and (2) those related to the manufacturing process, including handling and packaging.  
1.4 The inspection described generally takes place after polishing and post-polish cleaning but before packaging. Although cleaning and packaging procedures are not a part of this practice, the inspection may be performed on a packaged product to determine the effect of such procedures on the quality of the polished wafers.
1.5 The values stated in SI units are to be regarded as the standard. The values given in parentheses are for information only.
1.6 This standard does not purport to address all of the safety concerns, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.

General Information

• Status: Historical
• Publication Date: 09-Dec-1997
• ICS: 29.045 - Semiconducting materials
• Technical Committee: F01 - Electronics

Relations

• Replaced By: ASTM F523-02 - Standard Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces (Withdrawn 2003)
• Effective Date: 10-Dec-2002

Standards Content (Sample)

NOTICE: This standard has either been superseded and replaced by a new version or withdrawn. Contact
ASTM International (www.astm.org) for the latest information.
Designation: F 523 – 93 (Reapproved 1997)
AMERICAN SOCIETY FOR TESTING AND MATERIALS
100 Barr Harbor Dr., West Conshohocken, PA 19428
Reprinted from the Annual Book of ASTM Standards. Copyright ASTM
Standard Practice for
Unaided Visual Inspection of Polished Silicon Wafer
1
Surfaces
This standard is issued under the fixed designation F 523; the number immediately following the designation indicates the year of
original adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. A
superscript epsilon (e) indicates an editorial change since the last revision or reapproval.
1. Scope Structures and Contaminants Seen on Specular Silicon
2
Surfaces
1.1 This practice covers an inspection procedure for deter-
F 416 Test Method for Detection of Oxidation Induced
mining the surface quality of silicon wafers that have been
2
Defects in Polished Silicon Wafers
polished on one side.
2.2 Federal Standard:
1.2 This practice is intended as a large-volume acceptance
Fed. Std. No. 209D Clean Room and Work Station Require-
method and as such does not require use of a microscope or
3
ments, Controlled Environment
other optical instruments. Because the inspection relies on the
2.3 Military Standard:
visual acuity of the operator, test results may be very operator-
MIL-STD-105E Sampling Procedures and Tables for In-
sensitive.
3
spection by Attributes
NOTE 1—For clarification of the identification of certain observed
defects, procedures given in Practices F 154 may be employed.
3. Terminology
1.3 Defects visible to the unaided eye on polished wafer
3.1 Definitions:
surfaces are categorized in three groups by the illumination
3.1.1 back surface—of a semiconductor wafer, the exposed
geometry which best delineates them: front-surface high-
surface opposite to that upon which active semiconductor
intensity light, front-surface diffuse light, and back-surface
devices have been or will be fabricated.
diffuse light. These defects originate from two sources: (1)
3.1.2 chip—in semiconductor wafers, region where material
those which are caused by imperfections in the silicon crystal,
has been removed from the surface or edge of the wafer.
and (2) those related to the manufacturing process, including
3.1.3 contaminant, area—foreign matter that is visible to
handling and packaging.
the unaided eye under high-intensity illumination on the wafer,
1.4 The inspection described generally takes place after
of extent greater than a single light-point defect.
polishing and post-polish cleaning but before packaging. Al-
3.1.4 crack—cleavage or fracture that extends to the surface
though cleaning and packaging procedures are not a part of this
of a wafer.
practice, the inspection may be performed on a packaged
3.1.5 cratering—a surface texture of irregular closed ridges
product to determine the effect of such procedures on the
with smooth central regions.
quality of the polished wafers.
3.1.6 crow’s foot— on semiconductor wafers, intersecting
1.5 The values stated in SI units are to be regarded as the
cracks in a pattern resembling a 88crow’s foot’’ (Y)on{111}
standard. The values given in parentheses are for information
surfaces and a cross (+) on {100} surfaces.
only.
3.1.7 dimple—on semiconductor wafers, a smooth surface
1.6 This standard does not purport to address all of the
depression larger than 3 mm in diameter.
safety concerns, if any, associated with its use. It is the
3.1.8 front surface—of a semiconductor wafer, the exposed
responsibility of the user of this standard to establish appro-
surface on which active devices have been or will be fabri-
priate safety and health practices and determine the applica-
cated.
bility of regulatory limitations prior to use.
3.1.9 groove—in a semiconductor wafer, a shallow scratch
with rounded edges, that is usually the remnant of a scratch not
2. Referenced Documents
completely removed by mechanical polishing.
2.1 ASTM Standards:
3.1.10 haze—on a semiconductor wafer, a cloudy or hazy
F 154 Practices and Nomenclature for Identification of
appearance attributable to light scattering by concentrations of
microscopic surface irregularities such as pits, mounds, small
ridges or scratches, particles, etc.
1
This practice is under the jurisdiction of ASTM Committee F-1 on Electronics
and is the direct responsibility of Subcommittee F01.06 on Electrical and Optical
2
Measurement. Annual Book of ASTM Standards, Vol. 10.05.
3
Current edition approved Sept. 15, 1993. Published November 1993. Originally Available from Standardization Documents Order Desk, Bldg. 4 Section D, 700
published as F 523 – 77 T. Last previous edition F 523 – 88. Robbins Ave., Philadelphia, PA 19111-5094, Attn: NPODS.
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