IEC 63055:2023

Format for LSI-Package-Board Interoperable design

IEC 63055:2023 defines a common interoperable format that will be used for the design of a) large-scale integration (LSI), b) packages for such LSI, and c) printed circuit boards on which the packaged LSIs are interconnected. Collectively, such designs are referred to as LSI-Package-Board (LPB) designs. The format provides a common way to specify information/data about the project management, netlists, components, design rules, and geometries used in LPB designs. This is an IEC/IEEE dual logo standard.

General Information

• Status: Published
• Publication Date: 10-Oct-2023
• ICS: 31.180 - Printed circuits and boards
• ICS: 31.200 - Integrated circuits. Microelectronics
• ICS: 35.060 - Languages used in information technology
• Technical Committee: TC 91 - Electronics assembly technology
• Drafting Committee: WG 13 - TC 91/WG 13
• Current Stage: PPUB - Publication issued
• Start Date: 08-Sep-2023
• Completion Date: 11-Oct-2023

Relations

• Revises: IEC 63055:2016 - Format for LSI-Package-Board Interoperable design
• Effective Date: 05-Sep-2023

Standards Content (Sample)

IEC 63055 ®
Edition 2.0 2023-10
™
IEEE Std 2401
INTERNATIONAL
STANDARD
colour
inside
Format for LSI-Package-Board Interoperable design
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IEC 63055 ®
Edition 2.0 2023-10
IEEE Std 2401™
INTERNATIONAL
STANDARD
colour
inside
Format for LSI-Package-Board Interoperable design
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 31.180, 31.200, 35.060 ISBN 978-2-8322-7515-3
– i – IEEE Std 2401™-2019
Contents
1. Overview .11
1.1 Scope .11
1.2 Purpose .11
1.3 Key characteristics of the LSI-Package-Board Format .11
1.4 Contents of this standard .12
1.5 Word usage .13
2. Normative references .13
3. Definitions, acronyms, and abbreviations .13
3.1 Definitions .13
3.2 Acronyms and abbreviations .16
4. Concept of the LPB Format .18
4.1 Technical background .18
4.2 Conventional design .18
4.3 Common problems at the design site .19
4.4 Concept of LPB interoperable design .19
4.5 Value creation by LPB interoperable design .19
4.6 LPB Format .21
4.7 Summary of LPB Format files .21
5. Language basics.27
5.1 General .27
5.2 Typographic and syntax conventions .27
5.3 Character information .28
5.4 Notation of the floating point number .28
5.5 File naming definitions .28
6. Common elements in M-Format, C-Format, and R-Format .29
6.1 General .29
6.2 The element .29
6.3 The

element .30
6.4 The element .32
7. M-Format.48
7.1 M-Format file structure.48
7.2 The element .49
7.3 The element.49
7.4 The element .50
8. C-Format .56
8.1 C-Format file structure .56
8.2 The element .56
8.3 The element .161
9. R-Format .165
9.1 R-Format file structure .165
9.2 The element .166
9.3 The element .201
This is a copyrighted IEEE Standard. For personal or standards development use only.
Published by IEC under licence from IEEE. © 2019 IEEE. All rights reserved.

IEEE Std 2401™-2019 – ii–
10. N-Format .211
10.1 Purpose of the N-Format file .211
10.2 How to identify the power/ground network .211
10.3 Example .212
11. G-Format .212
11.1 Language basics of G-Format .212
11.2 Structure .213
11.3 Header section .214
11.4 Material section .215
11.5 Layer section.215
11.6 Shape section .216
11.7 Board geometry section .220
11.8 Padstack section .221
11.9 Part section .222
11.10 Component section .224
11.11 Net attribute section .225
11.12 Netlist section .225
11.13 Via section .227
11.14 Bondwire section .228
11.15 Route section .229
Annex A (informative) Bibliography .233
Annex B (informative) Examples of utilization .235
B.1 Understanding the function of the LPB Format .235
B.2 Test bench .235
B.3 Design flow example .237
B.4 Growth of the sample files in the LPB Format .269
B.5 Simulations using the sample files in the LPB Format .273
Annex C (informative) XML Encryption .275
Annex D (informative) MD5 checksum .278
Annex E (informative) Chip-Package Interface Protocol .279
E.1 General .279
E.2 Comparison of C-Format with Chip-Package Interface Protocol .279
Annex F (informative) M-Format usage examples .284
F.1 General .
...