Integrated circuits - Measurement of impulse immunity - Part 3: Non-synchronous transient injection method

This part of IEC 62215 specifies a method for measuring the immunity of an integrated circuit (IC) to standardized conducted electrical transient disturbances. The disturbances, not necessarily synchronized to the operation of the device under test (DUT), are applied to the IC pins via coupling networks. This method enables understanding and classification of interaction between conducted transient disturbances and performance degradation induced in ICs regardless of transients within or beyond the specified operating voltage range.

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Circuits intégrés - Mesure de l'immunité aux impulsions - Partie 3: Méthode d'injection de transitoires non synchrones

La CEI 62215-3:2013 spécifie une méthode pour mesurer l'immunité d'un circuit intégré (CI) aux perturbations transitoires électriques conduites normalisées. Les perturbations, non nécessairement synchronisées sur le fonctionnement du dispositif en essai (DUT, device under test), sont appliquées aux broches du circuit intégré via des réseaux de couplage. Cette méthode permet de comprendre et de classer les interactions entre des perturbations transitoires conduites et la dégradation de fonctionnement induite dans les circuits intégrés indépendamment des transitoires à l'intérieur ou au-delà de la gamme de tensions de fonctionnement spécifiées.

Integrirana vezja - Merjenje odpornosti proti impulzom - 3. del: Metoda z vnašanjem prehodnih nesinhronih motenj (IEC 62215-3:2013)

Ta del standarda IEC 62215 določa metodo za merjenje imunosti integriranega vezja (IC) na standardne vodene električne prehodne motnje. Motnje, ki niso nujno usklajene z delovanjem naprave, ki se preskuša, se na kontakte integriranih vezij prenesejo prek priklopnih omrežij. Ta metoda omogoča razumevanje in razvrstitev povezave med vodenimi prehodnimi motnjami in slabšim delovanjem, induciranim v integriranih vezjih, ne glede na prehodne motnje znotraj ali zunaj določenega razpona delovne napetosti.

General Information

Status
Published
Publication Date
09-Apr-2014
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
25-Mar-2014
Due Date
30-May-2014
Completion Date
10-Apr-2014

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2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.Integrirana vezja - Merjenje odpornosti proti impulzom - 3. del: Metoda z vnašanjem prehodnih nesinhronih motenj (IEC 62215-3:2013)/Circuits intégrés - Mesure de l'immunité aux impulsions - Partie 3: Méthode d'injection de transitoires non synchronesIntegrated circuits - Measurement of impulse immunity - Part 3: Non-synchronous transient injection method31.200Integrirana vezja, mikroelektronikaIntegrated circuits. MicroelectronicsICS:Ta slovenski standard je istoveten z:EN 62215-3:2013SIST EN 62215-3:2014en01-maj-2014SIST EN 62215-3:2014SLOVENSKI
STANDARD



SIST EN 62215-3:2014



EUROPEAN STANDARD EN 62215-3 NORME EUROPÉENNE
EUROPÄISCHE NORM October 2013
CENELEC European Committee for Electrotechnical Standardization Comité Européen de Normalisation Electrotechnique Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B - 1000 Brussels
© 2013 CENELEC -
All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 62215-3:2013 E
ICS 31.200
English version
Integrated circuits -
Measurement of impulse immunity -
Part 3: Non-synchronous transient injection method (IEC 62215-3:2013)
Circuits intégrés -
Mesure de l'immunité aux impulsions -
Partie 3: Méthode d'injection de transitoires non synchrones (CEI 62215-3:2013)
Integrierte Schaltungen -
Messung der Störfestigkeit
gegen Impulse -
Teil 3: Asynchrones Transienteneinspeisungs-Verfahren (IEC 62215-3:2013)
This European Standard was approved by CENELEC on 2013-08-21. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom.
SIST EN 62215-3:2014



EN 62215-3:2013 - 2 -
Foreword The text of document 47A/881/CDV, future edition 1 of IEC 62215-3, prepared by SC 47A “Integrated circuits” of IEC/TC 47 “Semiconductor devices” was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as EN 62215-3:2013.
The following dates are fixed: • latest date by which the document has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2014-05-21 • latest date by which the national standards conflicting with the document have to be withdrawn (dow) 2016-08-21
Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such patent rights.
Endorsement notice The text of the International Standard IEC 62215-3:2013 was approved by CENELEC as a European Standard without any modification. SIST EN 62215-3:2014



- 3 - EN 62215-3:2013
Annex ZA
(normative)
Normative references to international publications with their corresponding European publications
The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
NOTE
When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies.
Publication Year Title EN/HD Year
IEC 60050 Series International Electrotechnical Vocabulary (IEV) - -
IEC 61000-4-4 2012 Electromagnetic compatibility (EMC) -
Part 4-4: Testing and measurement techniques - Electrical fast transient/burst immunity test EN 61000-4-4 2012
IEC 61000-4-5 + corr. October
2005 2009 Electromagnetic compatibility (EMC) -
Part 4-5: Testing and measurement techniques - Surge immunity test EN 61000-4-5 2006
IEC 62132-4 2006 Integrated circuits - Measurement of electromagnetic immunity, 150 kHz to 1 GHz - Part 4: Direct RF power injection method EN 62132-4 2006
ISO 7637-2 2011 Road vehicles - Electrical disturbances from conduction and coupling -
Part 2: Electrical transient conduction along supply lines only - -
SIST EN 62215-3:2014



SIST EN 62215-3:2014



IEC 62215-3 Edition 1.0 2013-07 INTERNATIONAL STANDARD NORME INTERNATIONALE Integrated circuits – Measurement of impulse immunity –
Part 3: Non-synchronous transient injection method
Circuits intégrés – Mesure de l'immunité aux impulsions –
Partie 3: Méthode d'injection de transitoires non synchrones
INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE V ICS 31.200 PRICE CODE CODE PRIX ISBN 978-2-8322-0994-3
® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale ®
Warning! Make sure that you obtained this publication from an authorized distributor.
Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé. SIST EN 62215-3:2014



– 2 – 62215-3 © IEC:2013 CONTENTS FOREWORD . 4 1 Scope . 6 2 Normative references . 6 3 Terms and definitions . 6 4 General . 8 5 Coupling networks . 9 5.1 General on coupling networks . 9 5.2 Supply injection network . 9 5.2.1 Direct injection . 9 5.2.2 Capacitive coupling . 10 5.3 Input injection . 10 5.4 Output injection . 11 5.5 Simultaneous multiple pin injection . 12 6 IC configuration and evaluation . 12 6.1 IC configuration and operating modes . 12 6.2 IC monitoring . 13 6.3 IC performance classes . 13 7 Test conditions . 14 7.1 General . 14 7.2 Ambient electromagnetic environment . 14 7.3 Ambient temperature . 14 7.4 IC supply voltage . 14 8 Test equipment . 14 8.1 General requirements for test equipment . 14 8.2 Cables . 14 8.3 Shielding . 14 8.4 Transient generator . 14 8.5 Power supply . 14 8.6 Monitoring and stimulation equipment . 14 8.7 Control unit . 15 9 Test set up . 15 9.1 General . 15 9.2 EMC test board . 15 10 Test procedure . 17 10.1 Test plan . 17 10.2 Test preparation . 17 10.3 Characterization of coupled impulses . 17 10.4 Impulse immunity measurement . 17 10.5 Interpretation and comparison of results . 18 10.6 Transient immunity acceptance level . 18 11 Test report . 18 Annex A (informative)
Test board recommendations . 19 Annex B (informative)
Selection hints for coupling and decoupling network values . 24 Annex C (informative)
Industrial and consumer applications . 26 Annex D (informative)
Vehicle applications . 29 SIST EN 62215-3:2014



62215-3 © IEC:2013 – 3 –
Figure 1 – Typical pin injection test implementation . 9 Figure 2 – Supply pin direct injection test implementation . 10 Figure 3 – Supply pin capacitive injection test implementation . 10 Figure 4 – Input pin injection test implementation . 11 Figure 5 – Output pin injection test implementation . 12 Figure 6 – Multiple pin injection test implementation . 12 Figure 7 – Test set-up diagram . 15 Figure 8 – Example of the routing from
the injection port to a pin of the DUT . 16 Figure A.1 – Typical EMC test board topology. 22 Figure A.2 – Example of implementation
of multiple injection structures . 23
Table A.1 – Position of vias over the board . 19 Table C.1 – Definition of pin types . 26 Table C.2 – Test circuit values . 27 Table C.3 – Example of IC impulse test level (IEC 61000-4-4) . 28 Table D.1 – IC pin type definition . 29 Table D.2 – Transient test level 12 V (ISO 7637-2) . 30 Table D.3 – Transient test level 24 V (ISO 7637-2) . 31 Table D.4 – Example of transient test specification . 32
SIST EN 62215-3:2014



– 4 – 62215-3 © IEC:2013 INTERNATIONAL ELECTROTECHNICAL COMMISSION ____________
INTEGRATED CIRCUITS –
MEASUREMENT OF IMPULSE IMMUNITY –
Part 3: Non-synchronous transient injection method
FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any services carried out by independent certification bodies. 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 62215-3 has been prepared by subcommittee 47A: Integrated circuits, of IEC technical committee 47: Semiconductor devices. The text of this standard is based on the following documents: CDV Report on voting 47A/881/CDV 47A/890/RVC
Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all parts in the IEC 62215 series, published under the general title Integrated circuits – Measurement of impulse immunity can be found on the IEC website. SIST EN 62215-3:2014



62215-3 © IEC:2013 – 5 – The committee has decided that the contents of this publication will remain unchanged until the stability date indicated on the IEC web site under "http://webstore.iec.ch" in the data related to the specific publication. At this date, the publication will be • reconfirmed, • withdrawn, • replaced by a revised edition, or • amended.
SIST EN 62215-3:2014



– 6 – 62215-3 © IEC:2013 INTEGRATED CIRCUITS –
MEASUREMENT OF IMPULSE IMMUNITY –
Part 3: Non-synchronous transient injection method
1 Scope This part of IEC 62215 specifies a method for measuring the immunity of an integrated circuit (IC) to standardized conducted electrical transient disturbances. The disturbances, not necessarily synchronized to the operation of the device under test (DUT), are applied to the IC pins via coupling networks. This method enables understanding and classification of interaction between conducted transient disturbances and performance degradation induced in ICs regardless of transients within or beyond the specified operating voltage range. 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. IEC 60050 (all parts), International Electrotechnical Vocabulary (IEV) (available at ) IEC 61000-4-4:2012, Electromagnetic compatibility (EMC) – Part 4-4: Testing and measurement techniques – Electrical fast transient/burst immunity test IEC 61000-4-5:2005, Electromagnetic compatibility (EMC) – Part 4-5: Testing and measurement techniques – Surge immunity test IEC 62132-4:2006, Integrated circuits – Measurement of electromagnetic immunity 150 kHz to 1 GHz – Part 4: Direct RF power injection method ISO 7637-2:2011, Road vehicles – Electrical disturbances from conduction and coupling – Part 2: Electrical transient conduction along supply lines only 3 Terms and definitions For the purposes of this document, the terms and definitions given in IEC 60050-131 and IEC 60050-161, some of which have been added for convenience, as well as the following apply. 3.1
auxiliary equipment equipment not under test but is indispensable for setting up all the functions and assessing the correct performance (operation) of the equipment under test (EUT) during its exposure to the disturbance 3.2
burst sequence of a limited number of distinct impulses or an oscillation of limited duration SIST EN 62215-3:2014



62215-3 © IEC:2013 – 7 – 3.3
coupling network electrical circuit for transferring energy from one circuit to another with well-defined impedance and known transfer characteristics 3.4
performance degradation undesired departure in the operational performance of any device, equipment or system from its intended performance Note 1 to entry: The term “degradation” can apply to temporary or permanent failure. 3.5
DUT device under test device, equipment or system being evaluated Note 1 to entry: In this part of IEC 62215, it refers to a semiconductor device being tested. Note 2 to entry: This note applies to the French language only. 3.6
EMC
electromagnetic compatibility ability of an equipment or system to function satisfactorily in its electromagnetic environment without introducing intolerable electromagnetic disturbance to anything in that environment 3.7
global pin pin that carries a signal or power which enters or leaves the application board without any active device in between 3.8
immunity ability of a device, equipment or system to perform without degradation in the presence of an electromagnetic disturbance 3.9
jitter short-term variations of the significant instants of a digital signal from their ideal positions in time 3.10
local pin pin that carries a signal or power which does not leave the application board Note 1 to entry: The signal or power remains on the application board
as a signal between two components with or without additional EMC circuitry. 3.11
response signal signal generated by the DUT for the purpose of monitoring for detecting performance degradation 3.12
electromagnetic ambient totality of electromagnetic phenomena existing at a given location SIST EN 62215-3:2014



– 8 – 62215-3 © IEC:2013 3.13
transient pertaining to or designating a phenomenon or a quantity which varies between two consecutive steady states during a time interval which is short compared with the time-scale of interest 3.14
surge voltage transient voltage wave propagating along a line or a circuit and characterized by rapid increase followed by a slower decrease of the voltage 3.15
VS power supply input 3.16
ZL line impedance of a trace on the test board 4 General Electrical transients are a common part of the EMC environment of electrical and electronic devices. These transients are generated often on power nets and are directly applied or coupled to the terminals of integrated circuits which may affect the functionality of the device. The knowledge about the impulse immunity level enables the optimization of the IC as well as the definition of application requirements. The transient waveforms are dependent on the application area of the DUT. Typical transient waveforms are burst and surge voltages as specified in IEC 61000-4-4 and IEC 61000-4-5 for industrial and consumer applications and in ISO 7637-2 for automotive application to get reproducible and comparable results for different DUTs. The impulse immunity measurement method as described in this standard uses impulses with different amplitude and rise times, duration, energy and polarity in a conductive mode to the IC. In this test method the test time or the number of the applied impulses has to be chosen in a way that statistical effects are covered. This method is similar to immunity test method of integrated circuits in the presence of conducted RF disturbances defined in IEC 62132-4. As in IEC 62132-4, the disturbance signal can be injected into I/O pins, supply pins and into the PCB reference via defined coupling networks. The EMC test board for this method can be the same as the one specified in IEC 62132-4. The pin injection test method evaluates the performance of individual IC pins or groups of them when subjected to a transient waveform. Both positive and negative polarity transients, referenced to ground are applied. The basic test implementation is shown in Figure 1 . SIST EN 62215-3:2014



62215-3 © IEC:2013 – 9 –
ZL = 50 Ω Transient generator IC EMC test board Coupling network GND R IEC
1742/13
Figure 1 – Typical pin injection test implementation 5 Coupling networks 5.1 General on coupling networks The transient disturbances are applied to the IC pin under test via defined coupling networks implemented on the PCB and connected to a device pin with respect to the pin functionality and the disturbance signal. Coupling networks are defined for: • supply injection; • input injection; • output injection; • multiple pin injection. The coupling network shown in Figure 1 is identical to that used for RF immunity testing in IEC 62132-4. The series resistance (R) can be used to control the injected current, if required. The capacitance (C) is a DC block with a value selected to represent coupling effects in practice and to provide sufficient signal bandwidth while not excessively loading the connected pin (see Annex B). Default values of the series resistor and DC block capacitor are 0 Ω and 1 nF (representing capacity of 10 m parallel lines), respectively. A different capacity value may be used if required for correct functionality. The actual value of resistor and capacitor, including the rationale for their selection, shall be documented in the test report. 5.2 Supply injection network 5.2.1 Direct injection For supply pins directly connected to the power net a direct injection as shown in Figure 2 shall be used. For these tests the coupling and decoupling networks of the transient generators standardized in IEC 61000-4-4 and IEC 61000-4-5 for industrial or ISO 7637-2 for automotive applications are used. Mandatory blocking capacitors (CBL), filter or protection components at the supply pin have to be used as recommended by the manufacturer. SIST EN 62215-3:2014



– 10 – 62215-3 © IEC:2013
ZL = 50 Ω Transient generator IC EMC test board VS GND Supply=CBL IEC
1743/13
Figure 2 – Supply pin direct injection test implementation 5.2.2 Capacitive coupling For supply pins which are not directly connected to the power net, such as global distributed sub-supply nets isolated by power converters, the test circuitry shall be implemented as shown in Figure 3. The default values of the coupling network are 0 Ω=for the resistor and 1 nF for the coupling capacitor. =The external DC power supply should be decoupled from the supply pin(s) of the DUT with impedance (Z) greater than 400 Ω (default) over the frequency range of the test impulse spectrum. Other values for coupling and decoupling networks are possible but must be stated in the test report (see also Clause 11). Mandatory blocking capacitors, filter- or protection components at the supply pin have to be used as recommended by the manufacturer.
ZL = 50 Ω Transient generator IC EMC test board Z > 400 Ω VS GND Supply=CBL Coupling network C R IEC
1744/13
Figure 3 – Supply pin capacitive injection test implementation 5.3 Input injection For general purpose I/O pins configured as inputs or input-only pins and globally connected, the test circuitry shall be implemented as shown in Figure 4. The default values of the SIST EN 62215-3:2014



62215-3 © IEC:2013 – 11 – coupling network are 0 Ω=for the resistor and 1 nF for the coupling capacitor. External signal sources (e.g. signal generator) which are connected to the input signal connector should be decoupled from the input pin(s) of the DUT with impedance (Z) greater than 400 Ω (default) over the frequency range of the test impulse spectrum. Other values for coupling and decoupling networks are possible but shall be stated in the test report.= The input shall be configured as recommended by the manufacturer, only mandatory components have to be applied (e.g. with an appropriate external pull up resistor (RU), a pull down resistor (RD) or a series resistor (RS)). The DUT function shall not be affected by the coupling network.
Transient generator IC EMC test board Z > 400 Ω Input GND Input signal connector RU=VS RD=RS=ZL = 50 Ω Coupling network C R IEC
1745/13
Figure 4 – Input pin injection test implementation 5.4 Output injection For general purpose I/O pins configured as outputs or output-only pins and globally connected, the test circuitry shall be implemented as shown in Figure 5. The default values of the coupling network are 0 Ω=for the resistor and 1 nF for the coupling capacitor. External signal processing units or loads which are connected to the output signal connector should be decoupled from the output pin(s) of the DUT with impedance (Z) greater than 400 Ω (default) over the frequency range of the test impulse spectrum. Other values can be assigned to the coupling and decoupling networks but they shall be stated in the test report. The output shall be configured and loaded (e.g. with an appropriate external capacitive load (CL)) as specified by the manufacturer. Only mandatory external components according to the specification should be connected during test. For output pins, the DC block capacitance shall not exceed the rated capacitive load of this output to prevent an unacceptable deviation of the output signal. SIST EN 62215-3:2014



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Transient generator IC EMC test board Z > 400 Ω Output GND Output signal connector=CL ZL = 50 Ω Coupling network C R IEC
1746/13
Figure 5 – Output pin injection test implementation 5.5 Simultaneous multiple pin injection For parallel coupling to multiple pins or pin groups a coupling network consisting of one injection point and a capacitive impulse signal splitter can be used as shown in Figure 6. The default values of those coupling networks are the same as for respective single pins.
ZL = 50 Ω Transient generator IC EMC test board Coupling network GND Pin 1 Pin 2 C R C R IEC
1747/13
Fig
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