EN IEC 62228-1:2018

Integrated circuits - EMC evaluation of transceivers - Part 1: General conditions and definitions

IEC 62228-1:2018(E) provides general information and definitions for electromagnetic compatibility (EMC) evaluation of integrated circuits (IC) with transceivers for wired network applications under network condition. It defines general test conditions, general test setups and test and measurement methods are applied to all parts of IEC 62228.

Integrierte Schaltungen - Bewertung der elektromagnetischen Verträglichkeit von Sende-Empfangsgeräten - Teil 1: Allgemeine Bedingungen und Festlegungen

Circuits intégrés - Évaluation CEM des émetteurs-récepteurs - Partie 1 : Conditions générales et définitions

L'IEC 62228-1:2018 fournit des informations générales et des définitions relatives à l'évaluation de la compatibilité électromagnétique (CEM) des circuits intégrés (CI) avec émetteurs-récepteurs pour les applications de réseaux câblés dans des conditions de réseau. Elle définit les conditions générales d'essais, les montages d'essais généraux et les méthodes d'essais et de mesure qui sont appliqués à toutes les parties de l'IEC 62228.

Integrirana vezja - Vrednotenje elektromagnetne združljivosti (EMC) oddajnikov-sprejemnikov - 1. del: Splošni pogoji in definicije (IEC 62228-1:2018)

Ta del standarda IEC 62228 podaja splošne informacije in definicije za vrednotenje elektromagnetne združljivosti (EMC) integriranih vezij (IC) z oddajniki-sprejemniki v žičnem omrežju pri omrežnih pogojih. Opredeljuje splošne preskusne pogoje, splošne nastavitve preskusa ter preskusne in merilne metode, ki se uporabljajo za vse dele standarda IEC 62228.

General Information

• Status: Published
• Publication Date: 31-May-2018
• Withdrawal Date: 31-May-2021
• ICS: 31.200 - Integrated circuits. Microelectronics
• Technical Committee: CLC/SR 47A - Integrated circuits
• Drafting Committee: IEC/SC 47A - IEC_SC_47A
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 01-Jun-2018
• Completion Date: 01-Jun-2018
• Ref Project: SIST EN IEC 62228-1:2018 - Integrated Circuits - EMC evaluation of transceivers - Part 1: General conditions and definitions (IEC 62228-1:2018)

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN IEC 62228-1:2018
01-september-2018
Integrirana vezja - Vrednotenje elektromagnetne združljivosti (EMC) oddajnikov-
sprejemnikov - 1. del: Splošni pogoji in definicije (IEC 62228-1:2018)
Integrated Circuits - EMC evaluation of transceivers - Part 1: General conditions and
definitions (IEC 62228-1:2018)
Ta slovenski standard je istoveten z: EN IEC 62228-1:2018
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
33.100.01 Elektromagnetna združljivost Electromagnetic compatibility
na splošno in general
SIST EN IEC 62228-1:2018 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN IEC 62228-1:2018

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SIST EN IEC 62228-1:2018


EUROPEAN STANDARD EN IEC 62228-1

NORME EUROPÉENNE

EUROPÄISCHE NORM
June 2018
ICS 31.200

English Version
Integrated circuits - EMC evaluation of transceivers - Part 1:
General conditions and definitions
(IEC 62228-1:2018)
Circuits intégrés - Évaluation CEM des émetteurs- Integrierte Schaltungen - Bewertung der
récepteurs - Partie 1 : Conditions générales et définitions elektromagnetischen Verträglichkeit von Sende-
(IEC 62228-1:2018) Empfangsgeräten - Teil 1: Allgemeine Bedingungen und
Festlegungen
(IEC 62228-1:2018)
This European Standard was approved by CENELEC on 2018-02-13. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden,
Switzerland, Turkey and the United Kingdom.



European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2018 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN IEC 62228-1:2018 E

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SIST EN IEC 62228-1:2018
EN IEC 62228-1:2018 (E)

European foreword
The text of document 47A/1018/CDV, future edition 1 of IEC 62228-1, prepared by IEC/SC 47A
"Integrated circuits" of IEC/TC 47 "Semiconductor devices" was submitted to the IEC-CENELEC
parallel vote and approved by CENELEC as EN IEC 62228-1:2018.

The following dates are fixed:
• latest date by which the document has to be (dop) 2018-12-01
implemented at national level by
publication of an identical national
standard or by endorsement
(dow) 2021-06-01
• latest date by which the national
standards conflicting with the
document have to be withdrawn

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.

Endorsement notice
The text of the International Standard IEC 62228-1:2018 was approved by CENELEC as a European
Standard without any modification.
2

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SIST EN IEC 62228-1:2018
EN IEC 62228-1:2018 (E)

Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications

The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.

NOTE 1  Where an International Publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.

NOTE 2  Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.

Publication Year Title EN/HD Year
IEC 61967-1 -  Integrated circuits - Measurement of EN 61967-1 -
electromagn
...

SLOVENSKI STANDARD
oSIST prEN 62228-1:2017
01-september-2017
Integrirana vezja - Vrednotenje elektromagnetne združljivosti (EMC) oddajnikov-
sprejemnikov - 1. del: Splošni pogoji in definicije
Integrated Circuits - EMC evaluation of transceivers - Part 1: General conditions and
definitions
Ta slovenski standard je istoveten z: prEN 62228-1:2017
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
oSIST prEN 62228-1:2017 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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oSIST prEN 62228-1:2017

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oSIST prEN 62228-1:2017
47A/1018/CDV

COMMITTEE DRAFT FOR VOTE (CDV)
PROJECT NUMBER:
IEC 62228-1 ED1
DATE OF CIRCULATION: CLOSING DATE FOR VOTING:
2017-07-07 2017-09-29
SUPERSEDES DOCUMENTS:
47A/995/CD,47A/1013A/CC

IEC SC 47A : INTEGRATED CIRCUITS
SECRETARIAT: SECRETARY:
Japan Mr Yoshinori FUKUBA
OF INTEREST TO THE FOLLOWING COMMITTEES: PROPOSED HORIZONTAL STANDARD:


– Other TC/SCs are requested to indicate their interest, if
any, in this CDV to the secretary.
FUNCTIONS CONCERNED:
EMC ENVIRONMENT QUALITY ASSURANCE SAFETY

SUBMITTED FOR CENELEC PARALLEL VOTING NOT SUBMITTED FOR CENELEC PARALLEL VOTING
– Attention IEC-CENELEC parallel voting
– The attention of IEC National Committees, members of
CENELEC, is drawn to the fact that this Committee Draft for
Vote (CDV) is submitted for parallel voting.
– The CENELEC members are invited to vote through the
CENELEC online voting system.

– This document is still under study and subject to change. It should not be used for reference purposes.
– Recipients of this document are invited to submit, with their comments, notification of any relevant patent rights of
which they are aware and to provide supporting documentation.

TITLE:
Integrated circuits - EMC evaluation of transceivers - Part 1: General conditions and definitions

NOTE FROM TC/SC OFFICERS:


Copyright © 2017 International Electrotechnical Commission, IEC. All rights reserved. It is permitted to download this
electronic file, to make a copy and to print out the content for the sole purpose of preparing National Committee positions.
You may not copy or "mirror" the file or printed version of the document, or any part of it, for any other purpose without
permission in writing from IEC.

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oSIST prEN 62228-1:2017
62228-1/Ed1/CDV © IEC (E) – 2 – 47A/1018/CDV
1 CONTENTS
2
3 FOREWORD . 3
4 1 Scope . 5
5 2 Normative references . 5
6 3 Terms, definitions and abbreviations . 6
7 3.1.1 Global pin . 6
8 3.1.2 6
9 mandatory components . 6
10 3.2.1 DUT . 6
11 3.2.2 DPI . 6
12 3.2.3 ESD . 6
13 3.2.4 PCB . 6
14 3.2.5 RxD . 6
15 3.2.6 SBC . 6
16 3.2.7 TxD . 6
17 4 Philosophy . 7
18 5 General test conditions and test board specification . 8
19 6 Test report . 9
20
21 Figure 1 – General test configuration for tests in functional operation modes . 8
22 Figure 2 – General test configuration for unpowered ESD test . 8
23
24 Table 1 – Overview of test a
...