EN 62132-1:2016

Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions

IEC 62132-1:2015 provides general information and definitions about measurement of electromagnetic immunity of integrated circuits (ICs) to conducted and radiated disturbances. It also defines general test conditions, test equipment and setup, as well as the test procedures and content of the test reports for all parts of the IEC 62132 series. Test method comparison tables are included in Annex A to assist in selecting the appropriate measurement method(s). This edition includes the following significant technical changes with respect to the previous edition: a) frequency range of 150 kHz to 1 GHz has been deleted from the title; b) frequency step above 1 GHz has been added in Table 2 in 7.4.1; c) IC performance classes in 8.3 have been modified; d) Table A.1 was divided into two tables, and references to IEC 62132-8 and IEC 62132-9 have been added in the new Table A.2 in Annex A.

Integrierte Schaltungen - Messung der elektromagnetischen Störfestigkeit - Teil 1: Allgemeine Bedingungen und Begriffe

Circuits intégrés - Mesure de l'immunité électromagnétique - Partie 1: Conditions générales et définitions

L'IEC 62132-1:2015 fournit des informations générales et des définitions relatives à la mesure de l'immunité électromagnétique des circuits intégrés (CI) aux perturbations conduites et rayonnées. Elle définit également les conditions générales d'essai, l'équipement et le montage d'essai, ainsi que les méthodes d'essai et le contenu des rapports d'essai pour toutes les parties de la série IEC 62132. Des tableaux de comparaison des méthodes d'essai sont inclus dans l'Annexe A pour aider à la sélection de la ou des méthodes de mesure appropriées. Cette édition inclut les modifications techniques majeures suivantes par rapport à l'édition précédente: a) la plage de fréquences de 150 kHz à 1 GHz a été supprimée du titre; b) l'échelon de fréquence supérieur à 1 GHz a été ajouté dans le Tableau 2 de 7.4.1; c) les classes de performance des circuits intégrés de 8.3 ont été modifiées; d) le Tableau A.1 a été divisé en deux tableaux, et des références à l'IEC 62132-8 et à l'IEC 62132-9 ont été ajoutées dans le nouveau Tableau A.2 de l'Annexe A.

Integrirana vezja - Meritve elektromagnetne odpornosti - 1. del: Splošni pogoji in definicije

Ta del standarda IEC 62132 zagotavlja splošne informacije in definicije o meritvah elektromagnetne odpornosti integriranih vezij (IC) na prevodne in sevane motnje. Določa tudi splošne pogoje preskušanja, preskusno opremo in nastavitev, preskusne postopke in vsebino poročil o preskusih za vse dele serije standarda IEC 62132. Primerjalne preglednice preskusnih metod so vključene v dodatku A; so v pomoč pri izbiri ustrezne metode meritve.

General Information

• Status: Published
• Publication Date: 25-Feb-2016
• Withdrawal Date: 02-Dec-2018
• ICS: 31.200 - Integrated circuits. Microelectronics
• Technical Committee: CLC/TC 47X - Semiconductor devices and trusted chips
• Drafting Committee: IEC/SC 47A - IEC_SC_47A
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 26-Feb-2016
• Completion Date: 26-Feb-2016
• Ref Project: SIST EN 62132-1:2016 - Integrated circuits - Measurement of electromagnetic immunity - Part 1: General conditions and definitions

Relations

• Replaces: EN 62132-1:2006 - Integrated circuits - Measurement of electromagnetic immunity, 150 kHz to 1 GHz - Part 1: General conditions and definitions
• Effective Date: 29-Jan-2023

Standards Content (Sample)

SLOVENSKI STANDARD
01-april-2016
1DGRPHãþD
SIST EN 62132-1:2006
Integrirana vezja - Meritve elektromagnetne odpornosti - 1. del: Splošni pogoji in
definicije
Integrated circuits - Measurement of electromagnetic immunity - Part 1: General
conditions and definitions
Ta slovenski standard je istoveten z: EN 62132-1:2016
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
33.100.20 Imunost Immunity
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN 62132-1
NORME EUROPÉENNE
EUROPÄISCHE NORM
February 2016
ICS 31.200 Supersedes EN 62132-1:2006
English Version
Integrated circuits - Measurement of electromagnetic immunity -
Part 1: General conditions and definitions
(IEC 62132-1:2015)
Circuits intégrés - Mesure de l'immunité électromagnétique Integrierte Schaltungen - Messung der elektromagnetischen
- Partie 1: Conditions générales et définitions Störfestigkeit - Teil 1: Allgemeine Bedingungen und Begriffe
(IEC 62132-1:2015) (IEC 62132-1:2015)
This European Standard was approved by CENELEC on 2015-12-03. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN 62132-1:2016 E
European foreword
The text of document 47A/974/FDIS, future edition 2 of IEC 62132-1, prepared by SC 47A “Integrated
circuits” of IEC/TC 47 “Semiconductor devices” was submitted to the IEC-CENELEC parallel vote and
approved by CENELEC as EN 62132-1:2016.

The following dates are fixed:
(dop) 2016-09-03
• latest date by which the document has to be
implemented at national level by
publication of an identical national
standard or by endorsement
• latest date by which the national (dow) 2018-12-03
standards conflicting with the
document have to be withdrawn
This document supersedes EN 62132-1:2006.

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.
Endorsement notice
The text of the International Standard IEC 62132-1:2015 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 61400-4-3 NOTE Harmonized as EN 61400-4-3.
IEC 61400-4-6 NOTE Harmonized as EN 61400-4-6.
IEC 61967-1:2002 NOTE Harmonized as EN 61967-1:2002.
CISPR 20 NOTE Harmonized as EN 55020.

Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents, in whole or in part, are normatively referenced in this document and are
indispensable for its application. For dated references, only the edition cited applies. For undated
references, the latest edition of the referenced document (including any amendments) applies.
NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant

EN/HD applies.
NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 62132-2 -  Integrated circuits - Measurement of EN 62132-2 -
electromagnetic immunity -- Part 2:
Measurement of radiated immunity - TEM
cell and wideband TEM cell method
IEC 62132-3 -  Integrated circuits - Measurement of EN 62132-3 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 3: Bulk current injection (BCI)
method
IEC 62132-4 -  Integrated circuits - Measurement of EN 62132-4 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 4: Direct RF power injection
method
IEC 62132-5 -  Integrated circuits - Measurement of EN 62132-5 -
electromagnetic immunity, 150 kHz to 1
GHz -- Part 5: Workbench Faraday cage
method
IEC 62132-8 -  Integrated circuits - Measurement of EN 62132-8 -
electromagnetic immunity -- Part 8:
Measurement of radiated immunity - IC
stripline method
IEC/TS 62132-9 -  Integrated circuits - Measurement of - -
electromagnetic immunity - Part 9:
Measurement of radiated immunity -
Surface scan method
IEC 62132-1 ®
Edition 2.0 2015-10
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Integrated circuits – Measurement of electromagnetic immunity –

Part 1: General conditions and definitions

Circuits intégrés – Mesure de l'immunité électromagnétique –

Partie 1: Conditions générales et définitions

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.200 ISBN 978-2-8322-2968-2

– 2 – IEC 62132-1:2015 © IEC 2015
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references. 7
3 Terms and definitions . 7
4 Test conditions . 11
4.1 General . 11
4.2 Ambient conditions . 11
4.2.1 Ambient temperature . 11
4.2.2 RF ambient . 11
4.2.3 RF-immunity of the test setup . 11
4.2.4 Other ambient conditions . 11
4.3 Test generator . 11
4.4 Frequency range . 11
5 Test equipment . 12
5.1 General . 12
5.2 Shielding . 12
5.3 Test generator and power amplifier . 12
5.4 Other components . 12
6 Test setup . 12
6.1 General . 12
6.2 Test circuit board . 12
6.3 Pin selection scheme . 12
6.4 IC pin loading/termination . 13
6.5 Power supply requirements . 13
6.6 IC specific considerations . 13
6.6.1 IC supply voltage . 13
6.6.2 IC decoupling . 14
6.6.3 Operation of IC . 14
6.6.4 Guidelines for IC stimulation . 14
6.6.5 IC monitoring . 14
6.7 IC stability over time . 14
7 Test procedure . 14
7.1 Monitoring check . 14
7.2 Human exposure . 14
7.3 System verification . 14
7.4 Specific procedures . 15
7.4.1 Frequency steps . 15
7.4.2 Amplitude modulation . 15
7.4.3 Power levelling for modulation . 15
7.4.4 Dwell time . 16
7.4.5 Monitoring of the IC . 16
8 Test report. 16
8.1 General . 16

IEC 62132-1:2015 © IEC 2015 – 3 –
8.2 Immunity limits or levels . 17
8.3 IC performance classes . 17
8.4 Interpretation of results . 17
8.4.1 Comparison between IC(s) using the same test method . 17
8.4.2 Comparison between different test methods. 17
8.4.3 Correlation to module test methods . 17
Annex A (informative) Test method comparison table . 18
Annex B (informative) General test board description . 20
B.1 Overview. 20
B.2 Board description – Mechanical . 20
B.3 Board description – Electrical . 20
B.3.1 General . 20
B.3.2 Ground planes . 20
B.3.3 Package pins . 21
B.3.4 Via diameters . 21
B.3.5 Via distance . 21
B.3.6 Additional components . 21
B.3.7 Supply decoupling . 21
B.3.8 I/O load . 22
Bibliogr
...