SIST EN 62343-4-1:2016

Dynamic modules - Software and hardware interface standards - Part 4-1: 1x9 Wavelength selective switch (IEC 62343-4-1:2016)

This part of IEC 62343 describes and provides specifications for a software and hardware
interface for the 1 x 9 wavelength selective switch.
These switches can be controlled by resident firmware with this interface. This standard
addresses the configuration and function to control a WSS. This interface is intended to
enable a user or host to retrieve the switch status and/or adjust relevant switch and
attenuation settings.

Dynamische Module - Teil 4-1: Software- und Hardware- Schnittstelle - 1 x 9 wellenlängenselektiver Schalter

Modules dynamiques - Partie 4-1 : Interface logicielle et matérielle - Commutateur sélectif en longueur d'onde 1 x 9

IEC 62323-4-1:2016 décrit et fournit des spécifications d'une interface logicielle et matérielle pour le commutateur sélectif en longueur d'onde 1 x 9. Ces commutateurs peuvent être contrôlés par un micrologiciel résident et cette interface. La présente norme couvre la configuration et les fonctions permettant de contrôler un WSS. L'interface est destinée à permettre à un utilisateur ou à un hôte de récupérer l'état du commutateur et/ou de régler le commutateur en question et l'affaiblissement.
Mots clés: Un commutateur sélectif en longueur d’onde (WWS), multiplexage optique d'insertion-extraction reconfigurable (ROADM), multiplexage par répartition en longueur d’onde à forte densité (DWDM)

Dinamični moduli - Programska in strojna oprema za vmesnike - 4-1. del: 1x9-valovnodolžinska selektivna stikala (IEC 62343-4-1:2016)

Ta del standarda IEC 62343 opisuje in podaja specifikacije za programsko in strojno opremo za vmesnike za 1x9-valovnodolžinska selektivna stikala.
Ta stikala je mogoče upravljati z vdelano programsko opremo s tem vmesnikom. Ta standard obravnava konfiguracijo in delovanje za upravljanje valovnodolžinskih selektivnih stikal. Ta vmesnik omogoča uporabniku ali gostitelju, da pridobi stanje stikala in/ali prilagodi ustrezno stikalo in nastavitve slabljenja.

General Information

• Status: Published
• Publication Date: 07-Jun-2016
• ICS: 33.180.20 - Fibre optic interconnecting devices
• ICS: 35.200 - Interface and interconnection equipment
• Technical Committee: MOC - Mobile Communications
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 31-May-2016
• Due Date: 05-Aug-2016
• Completion Date: 08-Jun-2016
• Ref Project: EN 62343-4-1:2016 - Dynamic modules - Part 4-1: Software and hardware interface - 1 x 9 wavelength selective switch

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN 62343-4-1:2016
01-julij-2016
'LQDPLþQLPRGXOL3URJUDPVNDLQVWURMQDRSUHPD]DYPHVQLNHGHO[
YDORYQRGROåLQVNDVHOHNWLYQDVWLNDOD,(&
Dynamic modules - Software and hardware interface standards - Part 4-1: 1x9
Wavelength selective switch (IEC 62343-4-1:2016)
Ta slovenski standard je istoveten z: EN 62343-4-1:2016
ICS:
33.180.20 3RYH]RYDOQHQDSUDYH]D Fibre optic interconnecting
RSWLþQDYODNQD devices
35.200 Vmesniška in povezovalna Interface and interconnection
oprema equipment
SIST EN 62343-4-1:2016 en
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 62343-4-1:2016

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SIST EN 62343-4-1:2016


EUROPEAN STANDARD EN 62343-4-1

NORME EUROPÉENNE

EUROPÄISCHE NORM
May 2016
ICS 33.180.20

English Version
Dynamic modules - Part 4-1: Software and hardware interface -
1 x 9 wavelength selective switch
(IEC 62343-4-1:2016)
Modules dynamiques - Partie 4-1 : Interface logicielle et Dynamische Module - Teil 4-1: Software und Hardware
matérielle - Commutateur sélectif en longueur d'onde 1 x 9 Schnittstelle - 1 x 9 Wellenlängenselektiver Schalter
(IEC 62343-4-1:2016) (IEC 62343-4-1:2016)
This European Standard was approved by CENELEC on 2016-04-08. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia,
Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.


European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels
© 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
 Ref. No. EN 62343-4-1:2016 E

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SIST EN 62343-4-1:2016
EN 62343-4-1:2016
European foreword
The text of document 86C/1304/CDV, future edition 1 of IEC 62343-4-1, prepared by
SC 86C “Fibre optic systems and active devices” of IEC/TC 86 “Fibre optics” was submitted
to the IEC-CENELEC parallel vote and approved by CENELEC as EN 62343-4-1:2016.

The following dates are fixed:
• latest date by which the document has to be (dop) 2017-01-08
implemented at national level by
publication of an identical national
standard or by endorsement
(dow) 2019-04-08
• latest date by which the national
standards conflicting with the
document have to be withdrawn

Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC [and/or CEN] shall not be held responsible for identifying any or all such
patent rights.

Endorsement notice
The text of the International Standard IEC 62343-4-1:2016 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following note has to be added for the standard indicated :

IEC 62343-3-3 NOTE Harmonized as EN 62343-3-3.
2

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SIST EN 62343-4-1:2016
EN 62343-4-1:2016
Annex ZA
(normative)

Normative references to international publications
with their corresponding European publications

The following documents, in whole or in part, are normatively referenced in this document and are
indispensable for its application. For dated references, only the edition cited applies. For undated
references, the latest edition of the referenced document (including any amendments) applies.

NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.

NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:
www.cenelec.eu

Publication Year Title EN/HD Year

IEC 60050-731 -  International Electrotechnical Vocabulary - - -
Chapter 731: Optical fibre communication
IEC 62343 -  Dynamic modules - General and guidance EN 62343 -

3

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SIST EN 62343-4-1:2016



IEC 62343-4-1

®


Edition 1.0 2016-03




INTERNATIONAL



STANDARD




















Dynamic modules –

Part 4-1: Software and hardware interface – 1 x 9 wavelength selective switch



























INTERNATIONAL

ELECTROTECHNICAL


COMMISSION





ICS 33.180.20 ISBN 978-2-8322-3199-9



  Warning! Make sure that you obtained this publication from an authorized distributor.


® Registered trademark of the International Electrotechnical Commission

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SIST EN 62343-4-1:2016
– 2 – IEC 62343-4-1:2016 © IEC 2016
CONTENTS
FOREWORD . 3
INTRODUCTION . 5
1 Scope . 6
2 Normative references. 6
3 Terms, definitions and abbreviations . 6
3.1 Terms and definitions . 6
3.2 Abbreviations . 6
4 Basic configuration of WSS interface . 7
5 Software interface . 8
6 Hardware interface – Electrical connector . 11
Annex A (informative) Hardware interface details . 12
Annex B (informative) DPRAM memory map details and timing charts . 14
Bibliography . 30

Figure 1 – Basic configuration of WSS interface . 7
Figure B.1 – DPRAM READ CYCLE timing . 25
Figure B.2 – DPRAM WRITE CYCLE timing . 26
Figure B.3 – POWER ON timing . 26
Figure B.4 – START timing. 27
Figure B.5 – MASTER RESET timing . 27
Figure B.6 – SOFT RESET timing . 28
Figure B.7 – DPRAM BUSY timing . 28
Figure B.8 – ALARM timing . 29

Table 1 – Software interface . 9
Table 2 – DPRAM memory map . 10
Table A.1 – Connector form . 12
Table A.2 – Pin assignment . 12
Table A.3 – Supply voltages and currents . 13
Table A.4 – Low voltage TTL thresholds . 13
Table A.5 – Power consumption . 13
Table B.1 – DPRAM memory map specification A . 14
Table B.2 – DPRAM memory map specification B . 15
Table B.3 – Signal time specification . 24

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SIST EN 62343-4-1:2016
IEC 62343-4-1:2016 © IEC 2016 – 3 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

DYNAMIC MODULES –

Part 4-1: Software and hardware interface –
1 x 9 wavelength selective switch

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62343-4-1 has been prepared by subcommittee SC86C: Fibre
optic systems and active devices, of IEC technical committee 86: Fibre optics.
The text of this standard is based on the following documents:
CDV Report on voting
86C/1304/CDV 86C/1346/RVC

Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all parts in the IEC 62343 series, published under the general title Dynamic modules,
can be found on the IEC website.

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– 4 – IEC 62343-4-1:2016 © IEC 2016
The committee has decided that the contents of this publication will remain unchanged until
the stability date indicated on the IEC website under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
A bilingual version of this publication may be issued at a later date.

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SIST EN 62343-4-1:2016
IEC 62343-4-1:2016 © IEC 2016 – 5 –
INTRODUCTION
A wavelength selective switch (WSS) is a dynamic module, which is mainly used in a
reconfigurable optical add drop multiplexer (ROADM) system to switch all wavelength signals
to their respective required output port in dense wavelength division multiplexing (DWDM)
networks. The WSS module has one input port and a plurality of output ports (i.e. 1 x N WSS)
and can be used reversely, such as N input ports and one output port, depending on its
application. It is electrically controlled with software, which directs each wavelength signal
among an input DWDM signal from one input port to the required output port for each
wavelength signal.

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DYNAMIC MODULES –

Part 4-1: Software and hardware interface –
1 x 9 wavelength selective switch



1 Scope
This part of IEC 62343 describes and provides specifications for a software and hardware
interface for the 1 x 9 wavelength selective switch.
These switches can be controlled by resident firmware with this interface. This standard
addresses the configuration and function to control a WSS. This interface is intended to
enable a user or host to retrieve the switch status and/or adjust relevant switch and
attenuation settings.
2 Normative references
The following documents, in whole or in part, are normatively referenced in this document and
are indispensable for its application. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60050-731, International Electrotechnical Vocabulary – Chapter 731: Optical fibre
communication (available at http://www.electropedia.org)
IEC 62343, Dynamic modules - General and guidance
3 Terms, definitions and abbreviations
3.1 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60050-731 and
IEC 62343, as well as the following apply.
3.1.1
wavelength selective switch
WSS
dynamic module with one or more input ports and one or more output ports, which is mainly
used in a reconfigurable optical add drop multiplexer (ROADM) system to switch each
wavelength signal on each input port independently to its required output port in DWDM
networks
Note 1 to entry: It is electrically controlled with software.
Note 2 to entry: It can be used inverted, exchanging input and output ports.
Note 3 to entry: Each wavelength signal can be independently attenuated.
3.2 Abbreviations
For the purposes of this document, the following abbreviations apply.
DWDM dense wavelength division multiplexing
WSS wavelength selective switch

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SIST EN 62343-4-1:2016
IEC 62343-4-1:2016 © IEC 2016 – 7 –
ROADM reconfigurable optical add drop multiplexer
HC host controller
DPRAM dual-port RAM
FPGA field programmable gate array
DSP digital signal processor
R/W read or write
RW read and write
RO read only
CE chip enable
OE output enable
TxD transmitted data
RxD received data
4 Basic configuration of WSS interface
The software interface is intended to provide an access to the functions of the WSS module
and be the primary interface to command the unit. The HC controls the WSS module by
sending control signal, as well as command data, to the WSS module via a 12-bit address bus,
a 16-bit data bus, and DPRAM related signal lines such as Read/Write, Chip Enable, and
Output Enable. The HC also receives from the WSS module response signals and status data.
Any address within the DPRAM can be written to via the HC, however many of these values
will be overwritten upon the application of a command to the WSS module. The addresses,
which are identified as inputs, can be found further along in this document. In addition to the
DPRAM interface, RS232 serial communication is also supported by the WSS module.
The WSS module has a non-volatile memory to store the latest setting when requested. A
functional diagram of the WSS module controls is illustrated in Figure 1 below.
HC WSS module
DPRAM Address bus (12)
DPRAM Date bus (16)
DSP/ Optical
FPGA engine
DPRAM Control

RS232C TxD
RS232C RxD
Interface
MASTER RESET
Memory
SOFT RESET
READY
ALARM
IEC

Figure 1 – Basic configuration of WSS interface

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5 Software interface
The signals between the HC and the WSS module are low voltage +3,3 V logic levels. The
definitions of the signals and memory map are described in Table 1 and Table 2. Annex A
provides additional information on pin assignment. Annex B provides additional information
DPRAM memory map and timing charts.

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Table 1 – Software interface
No Functional Name Input/output Definitions
block
1 DPRAM Address (12- Input 12-bit address bus of DPRAM.
bit wide)
Data (16- Input/output 16-bit wide data bus of DPRAM.
bit wide)
START Input WSS module start input signal. This strobe is generated
by the HC to command the WSS module to perform a
specified task defined in command word 2. This signal is
an active low input signal.
DONE Output Done output signal. A level high is generated by the WSS
module when a specified task is completed.
ERROR Output Error output signal. A level high is generated by the WSS
module when it detects an error condition.
BUSY Output Busy output signal. This signal indicates that both the
WSS module and HC are trying to access the same dual
port RAM address at the same time. This signal is an
active low signal.
Read/write enable
(R/W) input signal.
This signal is
generated by the HC
to enable reading of
data from dual port
RAM, or writing of
data to dual port
RAM.



Chip enable (CE)
input signal. This
signal is generated
by the HC to select
the dual port RAM
devices. This signal
is an active low
signal.

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SIST EN 62343-4-1:2016
– 10 – IEC 62343-4-1:2016 © IEC 2016
No Functional Name Input/output Definitions
block
Chip output enable
(OE) input signal.
This signal is
generated by the HC
to enable the dual
port RAM to send out
data on the data bus.
This signal is an
active low signal.


2 RS232C TxD Output Transmitted data (TxD): This signal is active when data is
transmitted from the WSS module to the HC. When no
data is transmitted, the signal is held in the mark
condition.
RxD Input Received data (RxD): This signal is active when the WSS
module receives data from the HC. When no data is
transmitted, the signal is held in the mark condition.
3 Module control MASTER Input Input signal. This strobe is generated by the HC to
RESET command the WSS module to perform Master reset which
affects optical configurations of the module. This signal is
an active low input signal.
SOFT RESET Input Input signal. This resets the WSS module DSP without
affecting optical state of the WSS module. This signal is
an active low input signal.
READY Output This signal is asserted (logic '0') by the WSS module to
inform the HC that transmission may begin.
ALARM Output This signal is generated by the WSS module when a
hardware alarm or a software alarm is generated.

Table 2 – DPRAM memory map
No. Address Content R/W Notes
1 0x0001 Hardware and software version RO The hardware and software versions are
embedded.
2 0x0020 Command register RW
3 0x0021 Command code register RW
4 0x0022 Command data 1 register RW
5 0x0023 Status register RW
6 0x0025 Error code register RW
7 0x0028 WSS case temperature RO
8 0x0029 Hardware error register RO
9 0x0034 Command data 2 register RW
10 0x0035 Command data 3 register RW

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IEC 62343-4-1:2016 © IEC 2016 – 11 –
6 Hardware interface – Electrical connector
The electrical connector on the WSS module is an 80-contact receptacle. Annex A provides
additional information on connector form.

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Annex A
(informative)

Hardware interface details
Annex A describes two kinds of interfaces. All specifications in Annex A are informative. It is
recommended that the user chooses either connector form A or B. Table A.1 gives details on
connector form, Table A.2 on pin assignment, Table A.3 on the supply voltages and currents
for WSS module, Table A.4 on low voltage TTL thresholds and Table A.5 on power
consumption.
Table A.1 – Connector form
No Parameter Connector form A Connector form B
1 Connector form Samtec CLT-140-02-G-D-BE-A Samtec CLP-140-02-S-D

Table A.2 – Pin assignment
Functional
No Name Pin assignment A Pin assignment B
block
DPRA 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11
Dual port Address bit 0 to 11,
1 Address (12-bit wide)
RAM pin 51 to 62
Pin 70, 68, 66, 64, 62, 60, 58,
56, 54, 52, 48
DPRD 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14,15
 Data (16-bit wide) Data bit 0 to 15, pin 1 to 16
Pin 44, 42, 40, 38, 36, 34, 32,
30, 28, 26, 24, 22, 20, 18, 16,
14
 START START, pin 21 nSTART, pin 27
 DONE DONE, pin 23 DONE, pin 25
 ERROR ERROR, pin 25 ERROR, pin 23
 BUSY BUSY, pin 26, low nBUSY, pin 29
 Read Write from RAM Read Write from RAM, pin 45 R/nW, pin 15
 RAM Chip Enable RAM Chip Enable, pin 47 nCE, pin 13
RAM Chip Output RAM Chip Output Enable, pin
 nOE, pin 17
Enable 48
2 RS232C TxD TxD, pin 65 TxD, pin 51
 RxD RxD, pin 66 RxD, pin 53
Module
3 MASTER RESET MASTER RESET, pin 19 nRST, pin 74
control
 SOFT RESET HARD RESET, pin 46 nSWRST, pin 67
 READY CTS, pin 20 nREADY, pin 61
ALARM, pin 31 or nFAULT, pin
 ALARM WDERR, pin 24
33

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IEC 62343-4-1:2016 © IEC 2016 – 13 –
Table A.3 – Supply voltages and currents
Supply voltage and current A Supply voltage and current B
No Parameter Unit
Min. Typ. Max. Min. Typ. Max.
1 Supply voltage +3,3 V +3,14 +3,3 +3,5 NA NA NA V
2 Supply voltage +5,0 V +4,75 +5,0 +5,25 +4,75 +5,0 +5,6 V
Supply voltage
3 +4,75 +5,0 +5,25 +4,75 +5,0 +5,6 V
+5,0 V-Analog
Supply voltage
4 NA NA NA V
+14,25 +15,0 +15,75
+15,0 V-Analog
Supply voltage
5 -15,75 -15,0 -14,25 NA NA NA V
-15,0 V-Analog
6 NA NA NA NA NA A
Supply current +3,3 V +3,0
7 NA NA NA NA A
Supply current +5,0 V +2,0 +7,0
Supply current
8 NA NA NA NA NA A
+2,0
+5,0 V-Analog
Supply current
9 NA NA +1,0 NA NA NA A
+15,0 V-Analog
Supply current
10 NA NA 1,0 NA NA NA A
-15,0 V-Analog

All the WSS control signals are LVTTL CMOS (3,3 V). The voltage level thresholds are as
specified in Table A.4 below.
Table A.4 – Low voltage TTL thresholds
Low voltage TTL thresholds A Low voltage TTL thresholds B
No Parameter Unit
Min. Max. Min. Max.
1 Logic low input level NA -0,2 V
+0,8 +0,8
2 Logic high input level +2,0 +5,5 +2,0 +3,45 V
3 Logic low output level NA +0,4 NA +0,4 V
4 Logic high output level NA V
+2,4 +3,3 +2,8

Table A.5 – Power consumption
Power
Power consumption B
consumption A
No Parameter Unit
Max. Max.
Power
a
1 10 33 W
consumption
a
Including warm-up.

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Annex B
(informative)

DPRAM memory map details and timing charts
Annex B describes two types of DPRAM interfaces. All specifications in Annex B are
informative. It is recommended that the user chooses either specification A or B. Table B.1
provides the DPRAM memory map for specification A. Table B.2 provides the DPRAM
memory map for specification B. Table B.3 provides the signal time specification for both the
A and B interfaces. Figure B.1 through to Figure B.8 show the timing relationships of the
signals.
Table B.1 – DPRAM memory map specification A
Address Content (16 bits) Direction Note
From WSS The hardware and firmware
0x0001 Hardware and firmware version
module versions are embedded.
0x0020 Command register From host

controller
0x0021 Command code register

0x0022 Command data 1

From WSS Indicates command execution
0x0023 Status 1
module status, ready or error
Status code (contains results of
0x0024 Status 2
executed command)
0x0025 Error code

Temperature of WSS. This
0x0028 WSS module temperature address will be updated upon
receiving any command.
0x0029 Hardware failure register

0x0034 Command data 2 From host

controller
0x0035 Command data 3

Required port and differential From host Attenuation spectrum and port
Starting at 0x200
attenuation for each channel controller settings required
Port setting and accumulated differential From WSS Port settings and running sum of
Starting at 0x400
attenuations for each channel module differential attenuation
Stored port and accumulated From WSS Every time "store" command is
Starting at 0x600 attenuations for each channel read from module issued, the stored value is also
non-volatile RAM copied at 0x600
0x0803 Attenuation range (controllable range) The default stored value is 20 dB.
From WSS
Starting at 0x900 Wavelength of each channel Channel wavelength information
module
0x0F00- From host
User's reserved Confirmation module access
0x0FFF controller

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IEC 62343-4-1:2016 © IEC 2016 – 15 –
Table B.2 – DPRAM memory map specification B
Initial
Address Content R/W Data type Note
value
Device identification and version information registers
Assigned by customer (constant
0x0000 Supplier identifier RO Number Invariant
compiled into the code-base)
This is a reduced detail version of the
0x0001 Version number RO Number Invariant version number. It includes both
hardware and software versions.
Assigned by customer (constant
0x0002 Part identifier RO Number Invariant
compiled into the code-base)
Version
Hardware version Stored in NVRAM in the device, non
0x0003 RO (high 16 Invariant
high customer configurable
bits)
Version (low Stored in NVRAM in the device, non
0x0004 Hardware version low RO Invariant
16 bits) customer configurable
Version
Constant compiled into boot-loader code
0x0005 FPGA version high RO (high 16 Invariant
base (within FPGA configuration)
bits)
Version (low Constant compiled into boot-loader code
0x0006 FPGA version low RO Invariant
16 bits) base (within FPGA configuration)
Loaded
Version
Firmware version whenever Constant compiled into the code base
0x0007 RO (high 16
high code is and embedded in the file header
bits)
restarted
Loaded
Version (low whenever Constant compiled into the code base
0x0008 Firmware version low RO
16 bits) code is and embedded in the file header
restarted
Version
Boot-loader version Constant compiled into boot-loader code
0x0009 RO (high 16 Invariant
high base (within F
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