SIST EN 16602-60-12:2015
(Main)Space product assurance - Design, selection, procurement and use of die form monolithic microwave integrated circuits (MMICs)
Space product assurance - Design, selection, procurement and use of die form monolithic microwave integrated circuits (MMICs)
This Standard applies to all types of MMIC (monolithic microwave integrated circuit) based on III V compound materials for RF applications (i.e. frequency range ≥ 1 GHz). The requirements for the procurement of components in die form are defined.
It is not within the scope of this Standard to address packaged MMICs and discrete microwave components, these are dealt with in the relevant ESCC specification (ESCC 9010 and ESCC 5010).
This standard may be tailored for the specific characteristic and constraints of a space project in conformance with ECSS-S-ST-00.
Raumfahrtproduktsicherung - Design, Auswahl, Beschaffung und Nutzung von MMIC
Assurance produit des projets spatiaux - Conception, sélection, approvisionnement et utilisation de circuits intégrés monolithique hyperfréquence de forme die
La présente Norme s'applique à tous les types de MMIC (circuit intégré monolithique hyperfréquence) basés sur des matériaux composites de type III V pour les applications RF (par exemple, plage de fréquences ≥ 1 GHz). Elle définit les exigences en matière d'approvisionnement de composants de forme die.
Les MMIC conditionnés en boîtiers et les composants hyperfréquence discrets, qui sont traités dans les spécifications ESCC correspondantes (ESCC 9010 et ESCC 5010) n'entrent pas dans le champ d'application de la présente Norme.
La présente norme peut être adaptée aux caractéristiques et contraintes spécifiques d'un projet spatial conformément à l'ECSS-S-ST-00.
Zagotavljanje varnih proizvodov v vesoljski tehniki - Snovanje, izbiranje, nabava in uporaba monolitnih mikrovalovnih integriranih vezij (MMIC) v obliki čipov
Ta standard se uporablja za vse tipe MMIC (monolitnih mikrovalovnih integriranih vezij) na podlagi sestavljenih materialov III V za radiofrekvenčne uporabe (tj. frekvenčno območje ≥ 1 GHz). Opredeljene so zahteve za naročanje komponent v obliki čipov. Področje uporabe tega standarda ne zajema pakiranih MMIC in diskretnih mikrovalovnih komponent, ki so obravnavani v ustrezni specifikaciji ESCC (ESCC 9010 in ESCC 5010). Ta standard se lahko prilagodi posameznim lastnostim in omejitvam vesoljskega projekta v skladu s standardom ECSS-S-ST-00.
General Information
Standards Content (Sample)
SLOVENSKI STANDARD
SIST EN 16602-60-12:2015
01-januar-2015
=DJRWDYOMDQMHYDUQLKSURL]YRGRYYYHVROMVNLWHKQLNL6QRYDQMHL]ELUDQMHQDEDYDLQ
XSRUDEDPRQROLWQLKPLNURYDORYQLKLQWHJULUDQLKYH]LM 00,& YREOLNLþLSRY
Space product assurance - Design, selection, procurement and use of die form
monolithic microwave integrated circuits (MMICs)
Raumfahrtproduktsicherung - Design, Auswahl, Beschaffung und Nutzung von MMIC
Assurance produit des projets spatiaux - Conception, sélection, approvisionnement et
utilisation de circuits intégrés monolithique hyperfréquence de forme die
Ta slovenski standard je istoveten z: EN 16602-60-12:2014
ICS:
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
49.140 Vesoljski sistemi in operacije Space systems and
operations
SIST EN 16602-60-12:2015 en,fr,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
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SIST EN 16602-60-12:2015
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SIST EN 16602-60-12:2015
EUROPEAN STANDARD
EN 16602-60-12
NORME EUROPÉENNE
EUROPÄISCHE NORM
September 2014
ICS 49.140
English version
Space product assurance - Design, selection, procurement and
use of die form monolithic microwave integrated circuits
(MMICs)
Assurance produit des projets spatiaux - Conception, Raumfahrtproduktsicherung - Design, Auswahl,
sélection, approvisionnement et utilisation de circuits Beschaffung und Nutzung von MMIC
intégrés monolithique hyperfréquence de forme die
This European Standard was approved by CEN on 13 March 2014.
CEN and CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving
this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning
such national standards may be obtained on application to the CEN-CENELEC Management Centre or to any CEN and CENELEC
member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CEN and CENELEC member into its own language and notified to the CEN-CENELEC Management Centre
has the same status as the official versions.
CEN and CENELEC members are the national standards bodies and national electrotechnical committees of Austria, Belgium, Bulgaria,
Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greece,
Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania, Slovakia,
Slovenia, Spain, Sweden, Switzerland, Turkey and United Kingdom.
CEN-CENELEC Management Centre:
Avenue Marnix 17, B-1000 Brussels
© 2014 CEN/CENELEC All rights of exploitation in any form and by any means reserved Ref. No. EN 16602-60-12:2014 E
worldwide for CEN national Members and for CENELEC
Members.
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SIST EN 16602-60-12:2015
EN 16602-60-12:2014 (E)
Table of contents
Foreword . 6
Introduction . 7
1 Scope . 8
2 Normative references . 9
3 Terms, definitions and abbreviated terms . 10
3.1 Terms from other standards . 10
3.2 Terms specific to the present document . 10
3.3 Abbreviated terms. 12
4 General requirements. 14
4.1 Overview . 14
4.2 Flight model MMIC dies lots procurement . 14
4.3 Minimum quality requirements . 14
5 Selection . 15
5.1 General . 15
5.1.1 Overview . 15
5.1.2 Requirements . 15
5.2 Process selection. 16
5.3 Models, and design tools . 16
6 Responsibilities . 17
7 MMIC design . 18
7.1 Principles of MMIC design . 18
7.1.1 Overview . 18
7.1.2 General . 18
7.1.3 Number of design iterations . 18
7.1.4 Design trade-offs . 19
7.2 Design tasks . 19
7.2.1 Electrical design specification . 19
7.2.2 Design variations . 19
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7.2.3 Parasitic effects . 19
7.2.4 Transient simulation . 20
7.2.5 Thermal analysis . 20
7.2.6 Sensitivity to temperature, process variation and supply voltages . 20
7.2.7 Design testability . 21
7.2.8 Design stability analysis . 21
7.2.9 Maximum rating and robustness . 21
7.2.10 Layout optimization . 22
7.2.11 DRC or ERC . 22
7.3 Design reviews . 23
7.3.1 General . 23
7.3.2 MMIC architecture . 23
7.3.3 Schematic . 23
7.3.4 Simulation results . 23
7.3.5 Sensitivity and stability analysis . 24
7.3.6 Derating . 24
7.3.7 Layout . 24
7.3.8 Tests matrix . 24
7.3.9 Assembly . 24
7.3.10 Compliance matrix . 25
7.3.11 MMIC detail specification . 25
7.3.12 Development plan . 25
7.3.13 Design documentation . 25
7.3.14 MMIC summary design sheet . 25
8 Application approval . 26
8.1 General . 26
8.2 Test flow and test procedures . 26
9 Procurement and LAT specification . 28
10 Procurement . 29
10.1 General . 29
10.1.1 Overview . 29
10.1.2 Methodology . 29
10.2 Wafer screening and WAT . 29
10.2.1 General . 29
10.2.2 Wafer screening and WAT flows . 29
10.2.3 Wafer manufacturing and control . 30
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10.2.4 Wafer acceptance test . 31
10.2.5 Packaging . 32
10.2.6 Deliverables . 32
10.3 Dies incoming testing . 33
10.3.1 General . 33
10.3.2 Assembly test . 33
10.3.3 Visual inspection . 34
10.3.4 Electrical characterization . 34
10.4 User LAT procurement sequences . 35
10.4.1 General . 35
10.4.2 Sequence A: process, design and application validated . 38
10.4.3 Sequence B: process validated and new design or new application . 38
10.4.4 Sequence C: process, design and application not validated . 39
10.4.5 Sequence D: application approval testing . 40
10.4.6 Destructive physical analysis after user LAT . 40
10.5 Failure criteria and lot failure . 41
Annex A (normative) MMIC electrical design specification - DRD . 42
Annex B (normative) Compliance matrix for custom MMIC design - DRD . 43
Annex C (normative) Design package document - DRD . 44
Annex D (normative) MMIC summary design sheet - DRD . 46
Annex E (normative) MMIC procurement specification - DRD . 47
Annex F (normative) MMIC lot acceptance specification for user LAT -
DRD . 48
Annex G (normative) MMIC visual inspection summary sheet - DRD . 50
Annex H (informative) References . 51
Bibliography . 52
Figures
Figure 10-1: Wafer screening and WAT . 30
Figure 10-2: Dies or die incoming testing . 34
Figure 10-3: Acceptance flow for flight model die lots . 35
Figure 10-4: User LAT flow . 37
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Tables
Table 6-1: Customer and supplier responsibilities for the “foundry” and “catalogue”
modes . 17
Table 8-1: CTA tests and procedures for testing in sequence D . 27
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Foreword
This document (EN 16602-60-12:2014) has been prepared by Technical
Committee CEN/CLC/TC 5 “Space”, the secretariat of which is held by DIN.
This standard (EN 16602-60-12:2014) originates from ECSS-Q-ST-60-12C.
This European Standard shall be given the status of a national standard, either
by publication of an identical text or by endorsement, at the latest by March
2015, and conflicting national standards shall be withdrawn at the latest by
March 2015.
Attention is drawn to the possibility that some of the elements of this document
may be the subject of patent rights. CEN [and/or CENELEC] shall not be held
responsible for identifying any or all such patent rights.
This document has been prepared under a mandate given to CEN by the
European Commission and the European Free Trade Association.
This document has been developed to cover specifically space systems and has
therefore precedence over any EN covering the same scope but with a wider
domain of applicability (e.g. : aerospace).
According to the CEN-CENELEC Internal Regulations, the national standards
organizations of the following countries are bound to implement this European
Standard: Austria, Belgium, Bulgaria, Croatia, Cyprus, Czech Republic,
Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France,
Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania,
Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania,
Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United
Kingdom.
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Introduction
This Standard covers the design, selection, procurement and use of III-V
monolithic microwave integrated circuits (MMICs) for space equipment.
It defines the design activity for the technical (methodology, phases to be
followed) and quality (quality assurance, design review) aspects, and, the
selection and procurement rules for these components taking into account
whether or not the processes have been validated.
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EN 16602-60-12:2014 (E)
1
Scope
This Standard applies to all types of MMIC (monolithic microwave integrated
circuit) based on III-V compound materials for RF applications (i.e. frequency
range ≥ 1 GHz). The requirements for the procurement of components in die
form are defined.
It is not within the scope of this Standard to address packaged MMICs and
discrete microwave components, these are dealt with in the relevant ESCC
specification (ESCC 9010 and ESCC 5010).
This standard may be tailored for the specific characteristic and constraints of a
space project in conformance with ECSS-S-ST-00.
8
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EN 16602-60-12:2014 (E)
2
Normative references
The following normative documents contain provisions which, through
reference in this text, constitute provisions of this ECSS Standard. For dated
references, subsequent amendments to, or revisions of, any of these
publications do not apply. However, parties to agreements based on this ECSS
Standard are encouraged to investigate the possibility of applying the most
recent editions of the normative documents indicated below. For undated
references the latest edition of the publication referred to applies.
EN reference Reference in text Title
EN 16601-00-01 ECSS-S-ST-00-01 ECSS system— Glossary of terms
EN 16602-30-11 ECSS-Q-ST-30-11 Space product assurance — Derating -- EEE
components
EN 16602-60 ECSS-Q-ST-60 Space product assurance - Electrical, electronic and
electromechanical (EEE) components
EN 16602-60-05 ECSS-Q-ST-60-05 Space product assurance — Generic requirements for
hybrids
MIL-STD-883 Tests methods and procedures for microelectronics
ESCC 20600 Preservation, packaging and despatch of ESCC
electronic components
ESCC 24600 Minimum quality management system requirements
ESCC 2049010 Internal visual inspection of monolithic microwave
devices
ESCC 2439010 Requirements for capability approval of MMICs
ESCC 9010 Generic specification for MMICs
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3
Terms, definitions and abbreviated terms
3.1 Terms from other standards
For the purpose of this document, the terms and definitions given in
ECSS-S-ST-00-01 apply.
For the purpose of this document, the following term from ECSS-Q-ST-60-05
applies:
process identification document
3.2 Terms specific to the present document
3.2.1 batch lot
wafers from the same basic raw materials processed as a single set in the
manufacturing sequence (diffusion, metallization and passivation process) in a
limited and controlled period of time
NOTE A unique identifier or code is assigned to a batch
lot and to each wafer for processing traceability
purposes.
3.2.2 design rules check
control procedure for verifying that design rules have been satisfied
NOTE 1 Design rules checks are generally issued by the
supplier.
NOTE 2 DRC is performed using software.
3.2.3 designer
organization responsible for the design of the MMICs
3.2.4 die lot
set of all dies coming from a single wafer lot
3.2.5 electrical rule check
control procedure for verifying that the electrical rules have been satisfied
NOTE Electrical rules are generally issued by the
manufacturer.
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3.2.6 evaluated process
mature technology that has been successfully submitted to a set of electrical and
environmental testing to demonstrate performance and reliability limits
NOTE 1 ECSS-Q-ST-60-01 contains a list of evaluated
processes.
NOTE 2 The ESCC 2269010 specification defines the
requirements for the evaluation.
3.2.7 manufacturer
foundry responsible for the manufacturing of the MMICs
3.2.8 process control monitor
test vehicle used by the supplier to assess the stability of the manufacturing
process by means of controls conducted during a wafer production cycle
NOTE The PCM is repeated a number of times
(depending on the manufacturers) on each wafer
lot. The measurements taken during the PCM are
used to accept or reject the wafer according to the
relevant DC and RF criteria defined in the design
manual.
3.2.9 production lot
device types manufactured from the same basic raw materials on the same
production line, processed under the same manufacturing techniques and
controls using the same type of equipment
NOTE A production lot may be composed of one or many
batch lots.
3.2.10 qualified process
process that has been successfully submitted to a formal qualification testing
NOTE The ESCC 20100 specification defines the
requirements for the qualification.
3.2.11 reticule
group of circuit layouts (MMIC, TCV, DEC, PCM) defined by design at the
mask level, for duplication over the entire wafer during the MMIC
manufacturing
3.2.12 statistical process control
tool to control the quality and the stability of the technological process
NOTE SPC is implemented by measuring key parameters
during the different manufacturing steps and their
analysis using appropriate methods.
3.2.13 tile
See reticule
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3.2.14 user
entity responsible for the integration of the MMICs at upper level
NOTE Example: MMICs are integrated by users into, for
example, modules, hybrids, piece of equipment.
3.2.15 validated design
design that is successfully submitted to application approval testing and an
MMIC user LAT test
3.2.16 validated process
process that is evaluated or qualified
3.2.17 wafer lot
wafers manufactured from one or more batch lots
NOTE Depending on the maturity of the process a wafer
lot is defined as follows:
• Case 1 (non-evaluated or qualified process): a
wafer lot is a single wafer.
• Case 2 (evaluated or qualified process and new
MMIC design): a wafer lot is one batch lot.
• Case 3 (mature process and recurrent MMIC
design): a wafer lot is considered to be a
production lot of 4 batches manufactured
within a 3 month period.
3.3 Abbreviated terms
For the purpose of this standard, the abbreviated terms of ECSS-S-ST-00-01 and
the following apply:
Abbreviation Meaning
acceptance quality level
AQL
circuit type approval
CTA
dynamic evaluation circuit
DEC
design rules check
DRC
electrical rule check
ERC
high-temperature reverse bias
HTRB
lot acceptance test
LAT
low-temperature reverse bias
LTRB
monolithic microwave integrated circuit
MMIC
part approval document
PAD
process control monitor
PCM
process identification document
PID
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residual gas analysis
RGA
scanning acoustic microscopy
SAM
scanning electron microscope
SEM
single event upset
SEU
statistical process control
SPC
technological characterization vehicle
TCV
wafer acceptance testing
WAT
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4
General requirements
4.1 Overview
This Clause defines the requirements for die MMIC procurement. It completes
the user LAT requirements for MMIC die lot procurement as defined in
ECSS-Q-ST-60-05.
The responsibilities of the participants (e.g. designer, manufacturer or end-user)
are given from the prototype phase to the delivery of the dies for flight model
hybrid manufacturing.
4.2 Flight model MMIC dies lots procurement
a. The following steps involved in procuring MMICs for Space applications
shall be followed:
1. Process selection, in conformance with clause 5.
2. Allocation of responsibilities, in conformance with clause 6.
3. MMIC design, in conformance with clause 7.
4. Application approval, in conformance with clause 8
5. Procurement and LAT specifications, in conformance with
clause 9.
6. Die form procurement sequences, in conformance with clause 10.
b. The requirements for the qualification and procurement of MMIC
packaged devices given in ESCC 9010 shall apply.
4.3 Minimum quality requirements
a. The requirements for processing, production control and clean room
conditions defined in ESCC 24600 shall apply.
b. The manufacturer shall implement and maintain a product quality
programme, to ensure that reliability and quality is maintained
throughout all the phases of manufacturing and testing in conformance
with the requirements in ECSS-Q-ST-60.
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5
Selection
5.1 General
5.1.1 Overview
During the selection of the manufacturing process by the entity in charge of the
procurement, components are assessed for their conformance to the
requirements on reliability, application and environmental resistance as defined
for the project.
5.1.2 Requirements
a. The selection of a foundry shall take into account the maturity of the
technology, the validation status and the qualification domain as defined
in ESCC 2439010.
b. The MMIC design shall be analysed and validated in terms of application
domain compared to the qualification domain and space application
requirements.
NOTE The qualification domain is documented in terms
of the following boundaries with respect to any
potential failure mode identified on the process:
• The physical design and procedures that are
closely related to the manufacturing process (no
major process change identified since the
evaluation testing).
• The electrical design in term of extreme limits
(thermal, DC and RF parameters).
• Function (e.g. oscillator, gain block), and appli-
cation (e.g. small signal, pulsed, high drive).
• The performances, the reliability figures, and
the environmental resistance.
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5.2 Process selection
a. The selection of the foundry, and the manufacturing process, shall be
justified by the supplier, and approved by the customer.
b. The agreement shall be based on the specific application for which the
MMIC is designed and on further considerations such as:
1. The maturity of the process.
NOTE E.g. large volume production or experimental
technology.
2. The adequacy of the application to the electrical foundry manual,
considering, as a minimum, the following items:
(a) Equivalent circuits based on measurement results for all
passive elements, including lumped and distributed
components, in a format compatible for use with standard
circuit simulators.
NOTE E.g. transmission lines and discontinuities.
(b) Small signal (at various bias points) and large signal models
of active components based on measurement results, in a
format compatible for use with standard circuit simulators.
NOTE Example of such components are transistors, but
also Schottky and varactor diodes.
(c) Availability of standard components
NOTE E.g. lange couplers.
(d) Layout libraries, in a format compatible for use with
standard circuit simulators.
(e) Thermal, reliability, process variation design parameters.
(f) Space evaluation or qualification status including the results
of reliability evaluations performed by the foundry.
c. A foundry manual for each process used, shall be delivered to the
customer (provided the current issue is not already available) prior to the
design phase.
d. The MMIC specifications (satisfying the overall equipment requirements)
shall be established within the technical limits of the MMIC process used,
and be finalised following an iterative process.
5.3 Models, and design tools
a. Only approved models (fully experimentally verified and included in the
foundry manual) and design tools shall be used to design all the passive
and active (linear and non-linear) elements.
b. Any non-standard models and design tools shall be justified, and
approved by the customer.
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6
Responsibilities
There are two modes for developing and procuring MMICs:
• “Foundry” mode: the customer designs the MMIC and is entirely
responsible for the design, and the supplier (or manufacturer) only
guarantees the technology.
• “Catalogue” mode: the supplier designs the MMIC and is entirely
responsible for both the design and the technology, except for issues
related to incompatibility between the MMIC and the environment in the
customer application.
Table 6-1 summarizes the responsibilities of the supplier and the customer.
Table 6-1: Customer and supplier responsibilities for the “foundry” and
“catalogue” modes
Responsibility
Description Reference supplier customer
Process selection clause 5 X X
Design model validated and design tasks cl
...
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