EN IEC 61188-6-1:2021

Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern design - Generic requirements for land pattern on circuit boards

IEC 61188-6-1:2021 specifies the requirements for soldering surfaces on circuit boards. This includes lands and land pattern for surface mounted components and also solderable hole configurations for through-hole mounted components. These requirements are based on the solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.

Leiterplatten und Flachbaugruppen - Konstruktion und Anwendung - Teil 6-1: Anschlussflächengestaltung - Allgemeine Anforderungen an die Anschlussflächenstruktur auf Leiterplatten

Cartes imprimées et cartes imprimées équipées - Conception et utilisation - Partie 6-1: Conception de la zone de report - Exigences génériques pour la zone de report sur les cartes imprimées

L’IEC 61188-6-1:2021 spécifie les exigences relatives aux surfaces de brasage sur les cartes imprimées. Cela comprend les pastilles et la zone de report des composants montés en surface, ainsi que les configurations des trous de brasage des composants montés par trous traversants. Ces exigences se fondent sur les exigences relatives au joint de brasure de l’IEC 61191-1, l’IEC 61191-2, l’IEC 61191-3 et l’IEC 61191-4.

Plošče tiskanih vezij in sestavi plošč tiskanih vezij - Zasnova in uporaba - 6-1. del: Razmestitev priključkov - Osnovne zahteve za razmestitev priključkov na tiskanih vezjih

General Information

• Status: Published
• Publication Date: 01-Apr-2021
• ICS: 31.180 - Printed circuits and boards
• ICS: 31.190 - Electronic component assemblies
• Technical Committee: CLC/SR 91 - Electronics assembly technology
• Drafting Committee: IEC/TC 91 - IEC_TC_91
• Current Stage: 6060 - Document made available - Publishing
• Start Date: 02-Apr-2021
• Completion Date: 02-Apr-2021
• Ref Project: SIST EN IEC 61188-6-1:2021 - Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern design - Generic requirements for land pattern on circuit boards

Relations

• Replaces: EN 61188-5-1:2002 - Printed boards and printed board assemblies - Design and use - Part 5-1: Attachment (land/joint) considerations - Generic requirements
• Effective Date: 23-Mar-2021

Overview

EN IEC 61188-6-1:2021 - "Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern design" specifies generic requirements for land pattern design and soldering surfaces on circuit boards. The standard covers lands and land patterns for surface-mounted components and solderable hole configurations for through‑hole components. Requirements are aligned with solder‑joint criteria given in IEC 61191‑1 through IEC 61191‑4 and apply to PCB footprint design, manufacturability and reliable solder joints for both reflow and wave processes.

Key Topics and Technical Requirements

• Soldering surface requirements: Defines expectations for lands/pads used with different soldering techniques and component types.
• Land pattern rules: Generic guidance for creating PCB footprints (lands/pads) for surface mount and through‑hole components without prescribing proprietary dimensions.
• Soldering processes: Coverage of main soldering techniques - reflow soldering, reflow of leaded components, and wave soldering for both surface-mounted and through‑hole parts.
• Solder mask and metal-defined lands: Distinguishes metal‑defined (MD) and solder‑mask‑defined (SMD/NSMD) pad definitions and compares their implications for solder fillet formation and manufacturing tolerances.
• Component and terminal classification: Classification schemes for leaded and surface mount components, terminal types (flat bottom, vertical side, etc.) and associated land requirements.
• Dimensioning systems and tolerancing: Introduces a proportional dimensioning system, land/pad dimensioning considerations and tolerancing practices to manage fabrication and assembly variation.
• Design-for-assembly practices: Recommendations to aid reliable solder joints, including use of solder thieves and glueing practices for wave soldering scenarios.

Applications and Who Uses It

EN IEC 61188-6-1:2021 is intended for professionals involved in PCB and assembly design and production:

• PCB designers and footprint/library engineers planning land patterns and pad geometries
• Electronics assembly/process engineers optimizing reflow and wave soldering
• Contract manufacturers and OEMs establishing PCB fabrication and assembly requirements
• Quality, reliability and test engineers assessing solder joint criteria
• Standards and compliance teams referencing IEC-based land‑pattern guidance

Practical benefits include improved solder joint reliability, better manufacturability, reduced rework, and clearer communication between design and manufacturing using standardized land‑pattern principles.

Related Standards

• IEC 61191‑1 / IEC 61191‑2 / IEC 61191‑3 / IEC 61191‑4 - requirements for soldered electrical and electronic assemblies
• IEC 61760‑3 - component specification method for through‑hole reflow (THR)
• Supersedes: EN 61188‑5‑1:2002

Keywords: EN IEC 61188-6-1:2021, land pattern design, PCB land pattern, soldering surfaces, reflow soldering, wave soldering, metal‑defined pads, solder‑mask‑defined pads, PCB footprint standard.

Standards Content (Sample)

SLOVENSKI STANDARD
01-oktober-2021
Nadomešča:
SIST EN 61188-5-1:2003
Plošče tiskanih vezij in sestavi plošč tiskanih vezij - Zasnova in uporaba - 6-1. del:
Razmestitev priključkov - Osnovne zahteve za razmestitev priključkov na tiskanih
vezjih
Circuit boards and circuit board assemblies - Design and use - Part 6-1: Land pattern
design - Generic requirements for land pattern on circuit boards
Ta slovenski standard je istoveten z: EN IEC 61188-6-1:2021
ICS:
31.180 Tiskana vezja (TIV) in tiskane Printed circuits and boards
plošče
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

EUROPEAN STANDARD EN IEC 61188-6-1

NORME EUROPÉENNE
EUROPÄISCHE NORM
April 2021
ICS 31.180; 31.190 Supersedes EN 61188-5-1:2002 and all of its
amendments and corrigenda (if any)
English Version
Circuit boards and circuit board assemblies - Design and use -
Part 6-1: Land pattern design - Generic requirements for land
pattern on circuit boards
(IEC 61188-6-1:2021)
Cartes imprimées et cartes imprimées équipées - Leiterplatten und Flachbaugruppen - Konstruktion und
Conception et utilisation - Partie 6-1: Conception de la zone Anwendung - Teil 6-1: Anschlussflächengestaltung -
de report - Exigences génériques pour la zone de report sur Allgemeine Anforderungen an die Anschlussflächenstruktur
les cartes imprimées auf Leiterplatten
(IEC 61188-6-1:2021) (IEC 61188-6-1:2021)
This European Standard was approved by CENELEC on 2021-03-30. CENELEC members are bound to comply with the CEN/CENELEC
Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC
Management Centre or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation
under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the
same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,
Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the
Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,
Turkey and the United Kingdom.

European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels
© 2021 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.
Ref. No. EN IEC 61188-6-1:2021 E

European foreword
The text of document 91/1636/CDV, future edition 1 of IEC 61188-6-1, prepared by IEC/TC 91
"Electronics assembly technology" was submitted to the IEC-CENELEC parallel vote and approved by
CENELEC as EN IEC 61188-6-1:2021.
The following dates are fixed:
• latest date by which the document has to be implemented at national (dop) 2021-12-30
level by publication of an identical national standard or by endorsement
• latest date by which the national standards conflicting with the (dow) 2024-03-30
document have to be withdrawn
This document supersedes EN 61188-5-1:2002 and all of its amendments and corrigenda (if any).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.
Endorsement notice
The text of the International Standard IEC 61188-6-1:2021 was approved by CENELEC as a
European Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards
indicated:
IEC 61188-5-1:2002 NOTE Harmonized as EN 61188-5-1:2002 (not modified)
IEC 61188-5-2:2003 NOTE Harmonized as EN 61188-5-2:2003 (not modified)
IEC 61188-5-3:2007 NOTE Harmonized as EN 61188-5-3:2007 (not modified)
IEC 61188-5-4:2007 NOTE Harmonized as EN 61188-5-4:2007 (not modified)
IEC 61188-5-5:2007 NOTE Harmonized as EN 61188-5-5:2007 (not modified)
IEC 61188-5-6:2003 NOTE Harmonized as EN 61188-5-6:2003 (not modified)
IEC 61188-5-8:2007 NOTE Harmonized as EN 61188-5-8:2008 (not modified)
IEC 61188-6-2 NOTE Harmonized as EN IEC 61188-6-2
IEC 61760-1 NOTE Harmonized as EN IEC 61760-1

Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies. For
undated references, the latest edition of the referenced document (including any amendments)
applies.
NOTE 1  Where an International Publication has been modified by common modifications, indicated by (mod),
the relevant EN/HD applies.
NOTE 2  Up-to-date information on the latest versions of the European Standards listed in this annex is available
here: www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 60194 - Printed board design, manufacture and - -
assembly - Terms and definitions
IEC 61191-1 - Printed board assemblies - Part 1: Generic EN IEC 61191-1 -
specification - Requirements for soldered
electrical and electronic assemblies using
surface mount and related assembly
technologies
IEC 61191-2 2017 Printed board assemblies - Part 2: EN 61191-2 2017
Sectional specification - Requirements for
surface mount soldered assemblies
IEC 61191-3 - Printed board assemblies - Part 3: EN 61191-3 -
Sectional specification - Requirements for
through-hole mount soldered assemblies
IEC 61191-4 - Printed board assemblies - Part 4: EN 61191-4 -
Sectional specification - Requirements for
terminal soldered assemblies
IEC 61760-3 - Surface mounting technology - Part 3: EN IEC 61760-3 -
Standard method for the specification of
components for through-hole reflow (THR)
soldering
IEC 61188-6-1 ®
Edition 1.0 2021-02
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
colour
inside
Circuit boards and circuit board assemblies – Design and use –

Part 6-1: Land pattern design – Generic requirements for land pattern on

circuit boards
Cartes imprimées et cartes imprimées équipées – Conception et utilisation –

Partie 6-1: Conception de la zone de report – Exigences génériques pour la zone

de report sur les cartes imprimées

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.180; 31.190 ISBN 978-2-8322-9443-7

– 2 – IEC 61188-6-1:2021 © IEC 2021
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
4 Design requirements . 10
4.1 General . 10
4.2 Product classification . 10
4.3 General surface mount land and land pattern requirements. 11
4.4 Component packages and soldering process . 11
4.5 Soldering surface requirements. 11
4.5.1 Main soldering techniques . 11
4.5.2 Reflow soldering . 11
4.5.3 Reflow soldering of leaded components . 12
4.5.4 Wave soldering of surface mounted components . 12
4.5.5 Wave soldering of through-hole mounted components . 14
4.6 Soldering surface definition techniques . 15
4.6.1 General . 15
4.6.2 Metal defined lands . 15
4.6.3 Solder mask defined lands . 15
4.6.4 Comparison of solder mask defined and non solder mask defined
solderable surfaces . 16
5 Component classification . 16
5.1 General . 16
5.2 Leaded components . 16
5.3 Surface mount components . 17
6 The proportional dimensioning system . 17
7 Terminal classification . 18
7.1 Leaded terminals . 18
7.2 Surface mount terminals . 18
7.2.1 Terminal classes. 18
7.2.2 Flat bottom terminals . 18
7.2.3 General land requirements for flat bottom terminals . 19
7.2.4 Flat bottom and vertical side terminals . 19
7.2.5 General land requirements for flat bottom and vertical side terminals . 20
8 Requirements for lands of solder joints . 20
8.1 Land/Pad dimensioning considerations of leaded terminals . 20
8.2 Land dimensioning considerations of surface mount terminals . 20
Annex A (informative)  Dimensioning concept of former IEC 61188-5-1 . 21
A.1 Dimensioning systems . 21
A.1.1 General . 21
A.1.2 Component tolerancing . 22
A.1.3 Solving for dimension Z . 25
A.1.4 Land tolerancing . 25
A.1.5 Fabrication allowances . 25
A.1.6 Assembly tolerancing . 26

IEC 61188-6-1:2021 © IEC 2021 – 3 –
A.1.7 Dimension and tolerance analysis . 27
Annex B (informative)  History of land dimensioning standards . 29
B.1 IPC-782 . 29
B.2 IEC 61188-5 series . 29
B.3 IPC-7351 . 29
Bibliography . 30

Figure 1 – Component placed on solder paste . 12
Figure 2 – Component glued for wave soldering. 13
Figure 3 – Wave soldered component with solder thieves . 14
Figure 4 – Solder joint of a leaded component . 15
Figure 5 – Leaded component – Capacitor . 17
Figure 6 – Surface mount component – Chip capacitor . 17
Figure 7 – Flat bottom terminals with wettable flanks . 18
Figure A.1 – Profile tolerancing method . 21
Figure A.2 – Example of 3216M capacitor dimensioning for optimum solder fillet
condition . 22
Figure A.3 – Profile dimensioning of gull-wing leaded SOIC . 23
Figure A.4 – Pitch for multiple leaded component . 28

Table 1 – Flat bottom terminals . 19
Table 2 – Flat bottom/vertical side terminals . 19
Table A.1 – Conductor width tolerances . 26
Table A.2 – Feature location accuracy . 26

– 4 – IEC 61188-6-1:2021 © IEC 2021
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-1: Land pattern design –
Generic requirements for land pattern on circuit boards

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and
in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports,
Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their
preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with
may participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for
Standardization (ISO) in accordance with conditions determined by agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence between
any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter.
5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity
assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any
services carried out by independent certification bodies.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
IEC 61188-6-1 has been prepared by IEC technical committee 91: Electronics assembly
technology. It is an International Standard.
This first edition cancels and replaces the first edition of IEC 61188-5-1 published in 2002, and
constitutes a technical revision.
This edition includes the following significant technical changes with respect to the previous
edition:
a) The content is completely updated to reflect current industry requirements. See Introduction.

IEC 61188-6-1:2021 © IEC 2021 – 5 –
The text of this International Standard is based on the following documents:
Draft Report on voting
91/1636/CDV 91/1671/RVC
Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this International Standard is English.
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/standardsdev/publications.
A list of all parts in the IEC 61188 series, published under the general title Circuit boards and
circuit board assemblies – Design and use, can be found on the IEC website.
Future documents in this series will carry the new general title as cited above. Titles of existing
documents in this series will be updated at the time of the next edition.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under "http://webstore.iec.ch" in the data related to
the specific document. At this date, the document will be
 reconfirmed,
 withdrawn,
 replaced by a revised edition, or
 amended.
IMPORTANT – The "colour inside" logo on the cover page of this document indicates
that it contains colours which are considered to be useful for the correct understanding
of its contents. Users should therefore print this document using a colour printer.

– 6 – IEC 61188-6-1:2021 © IEC 2021
INTRODUCTION
Explanation why the following standards will be replaced by the new IEC 6188-6 series:
IEC 61188-5-1:2002, Printed boards and printed board assemblies – Design and use – Part 5‑1:
Attachment (land/joint) considerations – Generic requirements
‑2:
IEC 61188-5-2:2003, Printed boards and printed board assemblies – Design and use – Part 5
Attachment (land/joint) considerations – Discrete components
IEC 61188-5-3:2007, Printed boards and printed board assemblies – Design and use – Part 5‑3:
Attachment (land/joint) considerations – Components with gull-wing leads on two sides
IEC 61188-5-4:2007, Printed boards and printed board assemblies – Design and use – Part 5‑4:
Attachment (land/joint) considerations – Components with J leads on two sides
IEC 61188-5-5:2007, Printed boards and printed board assemblies – Design and use – Part 5‑5:
Attachment (land/joint) considerations – Components with gull-wing leads on four sides
‑6:
IEC 61188-5-6:2003, Printed boards and printed board assemblies – Design and use – Part 5
Attachment (land/joint) considerations – Chip carriers with J-leads on four sides
IEC 61188-5-8:2007, Printed board and printed board assemblies – Design and use – Part 5‑8:
Attachment (land/joint) considerations – Area array components (BGA, FBGA, CGA, LGA)
Content is mostly equivalent to IPC-782A with Amendments 1 and 2, which was replaced in
2002 by IPC-7351. The component spectrum and pitch levels have dramatically increased since
publication of the IEC 61188-5 (all parts) and the dimensioning concept does no longer fulfil the
mounting and soldering requirements.

IEC 61188-6-1:2021 © IEC 2021 – 7 –
CIRCUIT BOARDS AND CIRCUIT BOARD ASSEMBLIES –
DESIGN AND USE –
Part 6-1: Land pattern design –
Generic requirements for land pattern on circuit boards

1 Scope
This part of IEC 61188 specifies the requirements for soldering surfaces on circuit boards. This
includes lands and land pattern for surface mounted components and also solderable hole
configurations for through-hole mounted components. These requirements are based on the
solder joint requirements of the IEC 61191-1, IEC 61191-2, IEC 61191-3 and IEC 61191-4.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
IEC 60194, Printed board design, manufacture and assembly – Terms and definitions
IEC 61191-1, Printed board assemblies – Part 1: Generic specification – Requirements for
soldered electrical and electronic assemblies using surface mount and related assembly

technologies
IEC 61191-2:2017, Printed board assemblies – Part 2: Sectional specification – Requirements
for surface mount soldered assemblies
IEC 61191-3, Printed board assemblies – Part 3: Sectional specification – Requirements for
through-hole mount soldered assemblies
IEC 61191-4, Printed board assemblies – Part 4: Sectional specification – Requirements for
terminal soldered assemblies
IEC 61760-3, Surface mounting technology – Part 3: Standard method for the specification of
components for through hole reflow (THR) soldering
3 Terms and definitions
For the purposes of this document, the terms and definitions given in IEC 60194, and the
following apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp

– 8 – IEC 61188-6-1:2021 © IEC 2021
3.1
assembly
number of parts, subassemblies or combinations thereof joined together
Note 1 to entry: This term can be used in conjunction with other terms listed herein, for example, "printed board
assembly".
[SOURCE: IEC 60194:2015, 80.1327, modified – The second term "assembled board" has been
removed.]
3.2
annular ring
portion of conductive material that completely surrounds a hole
3.3
basic dimension
numerical value used to describe the theoretical exact location of a feature or hole
Note 1 to entry: it is the basis from which permissible variations are established by tolerance on other dimensions
in notes or by feature-control symbols.
[SOURCE: IEC 60194-1:2021, 3.2.24, modified – In the definition "for example a hole" has been
replaced by "or hole".]
3.4
castellation
recessed metallised feature on the edge of a leadless chip carrier that is used to interconnect
conducting surfaces or planes within or on the chip carrier
[SOURCE: IEC 60194-1:2021, 3.3.17]
3.5
component
individual part or combination of parts that, when together, perform (a) design function(s)
Note 1 to entry: See also "discrete component" in 3.4.17 of IEC 60194-2:2017.
[SOURCE: IEC 60194-2:2017, 3.3.19]
3.6
land
portion of a conductive pattern usually, but not exclusively, used for the connection and/or
attachment of components
3.7
land pattern
footprint
combination of lands that is used for the mounting, interconnection and testing of a particular
component
Note 1 to entry: Land pattern is also known as "footprint".
[SOURCE: IEC 60194-1:2021, 3.12.9]
3.8
nominal dimension
dimension that is between the maximum and minimum size of a feature (the tolerance on a
nominal dimension gives the limits of variation of a feature size)

IEC 61188-6-1:2021 © IEC 2021 – 9 –
3.9
plated through-hole
PTH
hole with plating on its walls that makes an electrical connection between conductive patterns
on internal layers, external layers, or both, of a printed board
[SOURCE: IEC 60194-1, 3.16.72, modified – The figure has been removed.]
3.10
printed board
PB
completely processed printed circuit and printed wiring configurations
Note 1 to entry: This includes single-sided, double-sided and multilayer boards with rigid, flexible, and rigid-flex
base materials.
Note 2 to entry: "Printed board" is a general term.
[SOURCE: IEC 60194-2:2017, 3.16.23, modified – The second term "board" has been removed
as well as the admitted terms "card" and "circuit card.]
3.11
registration
degree of conformity of the position of a pattern (or portion thereof), a hole, or other feature to
its intended position on a product
[SOURCE: IEC 60194-1:2021, 3.18.28]
3.12
soldering surface
solderable metallized surfaces on circuit boards
Note 1 to entry: This includes lands, annular rings and solderable surfaces of plated through-holes.
3.13
SOIC
small outline integrated circuit
surface-mount technology
SMT
technology where electrical connection of components is made to the surface of a conductive
pattern of a printed board and does not utilize component lead holes
3.14
terminal
connection element of an electronic component
3.15
through-hole technology
THT
assembly process for mounting component packages where leads are passed through
supported (plated-through) or unsupported (bare) holes in an interconnection substrate
3.16
via
plated through-hole that is used as an interlayer connection, but in which there is no intention
to insert a component lead or other reinforcing material
Note 1 to entry: See also "blind via" and "buried via" in 3.2.57 and 3.2.118 of IEC 60194-1:2021.
[SOURCE: IEC 60194-1:2021, 3.22.15]

– 10 – IEC 61188-6-1:2021 © IEC 2021
4 Design requirements
4.1 General
Although soldering surfaces are dimensionally defined and since they are a part of the printed
board circuitry geometry, they are subject to the producibility requirements and are influenced
by tolerances associated with plating, etching, assembly or other conditions. The producibility
aspects also pertain to the use of solder mask and legend printing and the registration required
between the solder mask and the conductor patterns. The smaller the component dimensions,
the more is producibility influenced by solder mask and silkscreen thickness. For circuit boards
with component packages size 1005M (0402 imperial size) and smaller, legend printing should
be avoided because it can have detrimental effects on solder paste printing.
This document assumes that the land pattern follows the principle that under nominal conditions,
the overlap of the component termination and the corresponding soldering land will be complete.
The dimensions used for component descriptions shall be taken from standards developed by
industrial and/or standards bodies. Designers should refer to these standards for additional or
specific component package dimensions. When packages are not standardized, manufacturer
datasheets are the foundation for dimensioning.
NOTE 1 For a comprehensive description of the given circuit board and for achieving the best possible solder joints
to the devices assembled, the whole set of design elements includes, in addition to the land pattern definition:
– solder mask;
– copper foil thickness;
– plating thickness;
– solder paste stencil;
– clearance between adjacent components;
– clearance between bottom of component and PCB surface, if relevant;
– keep-out areas, if relevant;
– suitable rules for adhesive applications.
All of these design elements are commonly defined for the mounting conditions. This standard is limited to defining
requirements for land patterns and includes recommendations for clearances between adjacent components and for
other design elements.
NOTE 2 Heat dissipation aspects have not been taken into account in this document.
Heavier components (greater mass per land) require larger lands or annular rings. In some
cases, the lands shown in the standard may not be large enough; in these cases, consideration
of additional measures like gluing can be necessary.
The preferred land form should be rectangular with rounded corners. The area of the smallest
circumscribed rectangle shall be equal to that of one land with straight corners.
4.2 Product classification
The IEC standard on soldering requirements (see IEC 61191-1) recognizes that electrical and
electronic assemblies are subject to classifications by intended end-item use. Three general
end-product types have been established to reflect differences in producibility, functional
performance requirements, and verification (inspection/test) frequency. It should be recognized
that there may be overlaps of equipment between types.
The user of the assemblies is responsible for determining the performance type of the product.
The purchase contract shall specify the product type required and indicate any exceptions or
additional requirements to the parameters, where appropriate.

IEC 61188-6-1:2021 © IEC 2021 – 11 –
Products are divided into levels A, B and C according to IEC 61191-1.
– LEVEL A: General electronic products
Includes consumer products, some computers and computer peripherals, and hardware
suitable for applications where the major requirement is functionality of the completed
assembly.
– LEVEL B: Dedicated service electronic products
Includes communications equipment, sophisticated business machines, and instruments
where high performance and extended life is required, and for which uninterrupted service
is desired but not mandatory. Typically the end-use environment would not cause failures.
– LEVEL C: High-performance electronic products
Includes all equipment where continued performance or performance-on-demand is
mandatory. Equipment downtime cannot be tolerated, end-use environment may be
uncommonly harsh, and the equipment shall function when required, such as life support
systems and other critical systems.
4.3 General surface mount land and land pattern requirements
The land pattern for components on circuit boards have to be dimensioned in such a way that,
regardless of the type of termination, a sufficient wettable surface on the circuit board is
provided to form a reliable solder joint during the soldering process, whatever the soldering
technique. This applies to the same extent to surface mounted components as to through-hole
components.
4.4 Component packages and soldering process
The circuit designer selects electronic components that fulfill the electrical requirements of the
end product. With the components, the circuit designer also selects the component package
with the terminals that allow to connect the components to the circuit board. Depending on the
type of terminal, the possible soldering process is also determined. For good manufacturability,
it is very important that the circuit designer knows the relationship between component
packages and the possible soldering methods.
4.5 Soldering surface requirements
4.5.1 Main soldering techniques
Each soldering process has its own requirements for the soldering surfaces. The two main
soldering techniques are reflow soldering and several types of wave soldering. The main
differences between both methods is the available amount of solder and the possibility of
components to move during reflow soldering.
Due to the process characteristics of both soldering techniques, different land dimensions are
required to form reliable solder joints and accurate placement of components after soldering.
4.5.2 Reflow soldering
Reflow soldering is the main soldering technique for soldering of surface mounted components.
First solder paste is deposited to solderable surfaces of the circuit board and after that the
components are placed on the solder paste. See Figure 1.

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Figure 1 – Component placed on solder paste
Typically, the components are only fixed by the stickiness of the flux. That is the reason why
the components are swimming on the liquid solder during soldering and can be moved by the
wetting forces of the solder.
The dimensions of the soldering surfaces for reflow soldering on the circuit board are critical:
• if the land is too small, the amount of solder may be insufficient to form a reliable solder
joint;
• if the land is too large, the wetting forces may move the component in one direction, which
can cause displacement to the extent of an open solder joint occurring;
• if the land is too large and the wetting forces on the vertical side of the terminal are greater
than on the bottom side, the component can be lifted by torque, leading to tombstoning and
an open solder joint.
• if the finished land sizes on the circuit board are different for both terminals of the
component, this imbalance also can cause tombstoning
4.5.3 Reflow soldering of leaded components
The process of reflow soldering of leaded components is called “through-hole reflow” or
sometimes also “pin in paste”. In this process, special requirements shall be met with regard to
the temperature resistance of components and the required volume of solder paste. The circuit
board designer has to select components carefully depending on the type of solder paste used
for reflow soldering. IEC 61760-3 shall be applied. Special care is required to apply enough
solder paste to fill the hole around the component pins and form a reliable solder joint.
4.5.4 Wave soldering of surface mounted components
During wave soldering, the surface mounted components shall be fixed by glue because they
are attached on the bottom surface of the circuit board. See Figure 2.
The board is then moved, face down, through the solder wave and the components are soldered.

IEC 61188-6-1:2021 © IEC 2021 – 13 –
There are only a limited number of surface mounted packages that can be wave soldered. The
circuit board designer shall check the manufacturer datasheets concerning soldering process
limitations.
For chip components smaller than 1608M (0603 imperial) and integrated circuits with pitches
less than 1,27 mm (50 mil imperial) wave soldering is not recommended.
In contrast to reflow soldering, the available solder volume compared to the required solder
volume to form a reliable solder joint is nearly unlimited. Additionally, as the components are
glued and cannot move, there is no risk that the lands are too large.
To avoid solder bridges, components shall be placed at a safe distance from each other.

Figure 2 – Component glued for wave soldering
Chip components should be placed parallel to the solder wave, integrated circuits like SO-
packages with gullwing terminals should be placed parallel to the board transport direction and
should be equipped with solder thieves. See Figure 3.

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Figure 3 – Wave soldered component with solder thieves
The dimensions of the soldering surfaces for wave soldering on the circuit board are only critical:
• if the lands are too small the solder wave may not get contact to the land, so that no sufficient
solder joint is formed;
• if the components are placed too close to each other solder bridging will occur.
4.5.5 Wave soldering of through-hole mounted components
Leaded components are inserted into holes of the circuit board from one side of the board and
then soldered from the other side. The solder wave contacts the leads and fills the holes in
direction of the opposite side with solder. See Figure 4.
Critical concerning solder fill of the hole is the gap between the lead and the plated hole wall:
– if the hole diameter is too small compared to the lead diameter, solder fill of the hole will be
insufficient to form a reliable solder joint;
– the same may be the case if the hole diameter is too big compared to the lead diameter.

IEC 61188-6-1:2021 © IEC 2021 – 15 –

Figure 4 – Solder joint of a leaded component
The second critical parameter for wave soldering is the size of the annular ring which influences
the heat input into the hole especially during selective soldering.
For lead-free selective wave soldering, dimensions of the annular ring should be especially
optimized for maximum heat transfer on the solder contact side and minimized for least heat
dissipation on the opposite side.
4.6 Soldering surface definition techniques
4.6.1 General
If the circuit board is covered with a solder mask, there are two different techniques to define
the extension of the solderable surfaces in design libraries. The more common concept are the
metal defined lands. The other concept are the solder mask defined lands. Both concepts have
advantages and disadvantages which are outlined in 4.6.2 to 4.6.4. The specific
recommendations made by the component manufacturers should also be taken into account.
4.6.2 Metal defined lands
If the circuit board is not equipped with a solder mask and even if there is a solder mask on the
circuit board, in most cases there is a solder mask clearance around the solderable surfaces.
Mostly this technique is called "Non Solder Mask Defined" (NSMD). Sometimes it is also called
“metal defined” because the metal part of the soldering surface determines its size.
4.6.3 Solder mask defined lands
In case of the solder mask defined lands there is a negative clearance of the solder mask
compared to the metal part, so that the solder mask opening is smaller than the metal surface
and the solder mask opening determines the solderable surface.

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4.6.4 Comparison of solder mask defined and non solder mask defined solderable
surfaces
Non solder mask defined lands are characterized by
• wettable surface bigger than solder mask defined of same diameter because the copper
thickness of the land increases the wettable surface;
• wettable surface is primarily dependent on the open metal surface connected to the pad or
land;
• variation of solder joints of same terminal type can be very big;
• copper adhesion less than solder mask defined because the solder mask improves land
adhesion;
• more frequently an uneven board topology depending on the surrounding circuitry with
solder mask over traces and copper planes.
Solder mask defined lands are defined by
• wettable surface smaller than metal defined, but all lands of same termination type have
same solderable surface. As a result the solder joint topology is very homogeneous for a
given terminal type;
• copper adhesion is better than metal defined of same diameter;
• flat board topology (if all solderable surfaces are solder mask defined).
5 Component classification
5.1 General
Based on construction of terminals and the related mounting and attachment technology
components are divided in two main classes. The first and historical class of components are
the components with leaded terminals which are soldered in plated through-holes (PTH) of the
circuit board. The mounting and attachment technology of the components is called Through-
Hole Technology or THT.
The second and newer component technology includes components with terminals that can be
soldered to the surface of the circuit board. The mounting and attachment technology of these
components is called Surface Mount Technology or SMT.
Due to the different shape and size of their terminals, the requirements for the lands and land
pattern are also different. For the circuit board designer, it is important to know the different
termination types, the solder joint requirements and the relation between solder joint formation
and land dimensions.
5.2 Leaded components
Leaded components consist of a body with one or multiple electrical functional elements and
leads which enable the connection to the surrounding circuitry of the circuit board by soldering.
See Figure 5.
IEC 61188-6-1:2021 © IEC 2021 – 17 –

Figure 5 – Leaded component – Capacitor
5.3 Surface mount components
Surface mounted components are equ
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