SIST EN 60191-6-18:2010

Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packagers - Design guide for ball grid array (BGA) (IEC 60191-6-18:2010)

IEC 60191-6-18:2010 provides standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger.

Mechanische Normung von Halbleiterbauelementen - Teil 6-18: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Ball-Grid-Array (BGA) (IEC 60191-6-18:2010)

Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-18: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception pour les boîtiers matriciels à billes (BGA) (CEI 60191-6-18:2010)

La CEI 60191-6-18:2010 fournit des dessins d'encombrement, des dimensions et des variations recommandées normalisés pour tous les boîtiers matriciels à billes de forme carrée (BGA), dont le pas de sortie est supérieur ou égal à 1 mm.

Mehanska standardizacija polprevodniških elementov - 6-18. del: Splošna pravila za izdelavo tehničnih risb naprav za pakiranje elementov za površinsko montažo - Navodilo za oblikovanje mreže krogličnih priključkov (BGA) (IEC 60191-6-18:2010)

Ta del IEC 60191 podaja standardne tehnične risbe, dimenzije in priporočene različice za vse mreže krogličnih priključkov (BGA), katerih konica je 1 mm ali večja.

General Information

• Status: Published
• Publication Date: 08-Mar-2010
• ICS: 01.100.25 - Electrical and electronics engineering drawings
• ICS: 31.080.01 - Semiconductor devices in general
• ICS: 31.240 - Mechanical structures for electronic equipment
• Technical Committee: I11 - Imaginarni 11
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 02-Mar-2010
• Due Date: 07-May-2010
• Completion Date: 09-Mar-2010
• Ref Project: EN 60191-6-18:2010 - Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA)

Overview

EN 60191-6-18:2010 (harmonized with IEC 60191-6-18:2010) is a mechanical standardization document that provides a design guide for Ball Grid Array (BGA) surface-mounted semiconductor packages. It defines standard outline drawings, dimensions, symbols and recommended variations for square BGA packages with a terminal pitch of 1.0 mm or larger. The standard supports consistent package outline definition to enable interchangeability, mounting, gauging and reliable PCB footprint design.

Key topics and technical requirements

• Scope and package types
  • Applies to square BGA packages: P-BGA (plastic/organic substrate), T-BGA (tape/polyimide substrate) and C-BGA (ceramic substrate). Includes P-BGA flip‑chip interconnection variants.
  • Covers packages with terminal pitch ≥ 1.0 mm.
• Nominal package dimensions
  • Defines nominal package sizes (E × D) expressed to the tenths of a millimetre. Recommended variations include sizes from 7.0 × 7.0 mm up to 60.0 × 60.0 mm.
• Terminal position numbering
  • Standardized alphanumeric grid (rows lettered A, B, C…; columns numbered 1, 2, 3…) and rules for omitting certain letters.
• Mechanical datums and symbols
  • Seating plane datum S, package profile tolerances, primary/secondary stand‑off heights, and index‑marking areas.
• Ball geometry and tolerancing
  • Terminology and control for ball diameter (bp), true‑position tolerances for terminal position areas (SD, SE), and guidance on permissible terminal-existing zones.
• Dimensions and tables
  • Grouped dimensions for mounting/interchangeability and for gauging. Recommended standard variations and combinations (detailed tables and figures are included in the standard).
• Drawings and examples
  • Standardized outline drawings (cavity‑up / cavity‑down), pattern of terminal position areas, and examples of terminal depopulation.

Applications

• Creating standardized outline drawings for BGA packages used in datasheets and component mechanical specifications.
• Defining PCB land patterns and assembly process parameters for surface-mounted BGA components.
• Ensuring interchangeability between suppliers and reducing proliferation of custom outlines.
• Mechanical verification, gauging, inspection plans and compliance checking during procurement and quality control.

Who uses this standard

• Semiconductor package designers and mechanical engineers
• PCB layout and footprint designers
• Contract manufacturers and assembly houses
• Test and inspection engineers, procurement and standards teams

Related standards

• EN/IEC 60191-6 (General rules for preparation of outline drawings for SMD packages)
• Other parts of the IEC 60191 series covering mechanical standardization of semiconductor devices

Keywords: EN 60191-6-18:2010, IEC 60191-6-18, BGA design guide, ball grid array, surface mounted, package outline drawings, package dimensions, P-BGA, T-BGA, C-BGA.

Standards Content (Sample)

2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.Mechanische Normung von Halbleiterbauelementen - Teil 6-18: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Ball-Grid-Array (BGA) (IEC 60191-6-18:2010)Normalisation mécanique des dispositifs à semiconducteurs - Partie 6-18: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception pour les boîtiers matriciels à billes (BGA) (CEI 60191-6-18:2010)Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packagers - Design guide for ball grid array (BGA) (IEC 60191-6-18:2010)31.240Mehanske konstrukcije za elektronsko opremoMechanical structures for electronic equipment31.080.01Polprevodniški elementi (naprave) na splošnoSemiconductor devices in general01.100.25Electrical and electronics engineering drawingsICS:Ta slovenski standard je istoveten z:EN 60191-6-18:2010SIST EN 60191-6-18:2010en,fr01-april-2010SIST EN 60191-6-18:2010SLOVENSKI
STANDARD
EUROPEAN STANDARD EN 60191-6-18 NORME EUROPÉENNE
EUROPÄISCHE NORM February 2010
CENELEC European Committee for Electrotechnical Standardization Comité Européen de Normalisation Electrotechnique Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: Avenue Marnix 17, B - 1000 Brussels
© 2010 CENELEC -
All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6-18:2010 E
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices -
Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages -
Design guide for ball grid array (BGA) (IEC 60191-6-18:2010)
Normalisation mécanique
des dispositifs à semiconducteurs -
Partie 6-18: Règles générales
pour la préparation des dessins d'encombrement des dispositifs
à semiconducteurs
pour montage en surface -
Guide de conception pour les boîtiers matriciels à billes (BGA) (CEI 60191-6-18:2010)
Mechanische Normung
von Halbleiterbauelementen -
Teil 6-18: Allgemeine Regeln
für die Erstellung
von Gehäusezeichnungen
von SMD-Halbleitergehäusen -
Konstruktionsleitfaden
für Ball-Grid-Array (BGA) (IEC 60191-6-18:2010)
This European Standard was approved by CENELEC on 2010-02-01. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom.
Foreword The text of document 47D/753A/FDIS, future edition 1 of IEC 60191-6-18, prepared by SC 47D, Mechanical standardization for semiconductor devices, of IEC TC 47, Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-18 on 2010-02-01. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CEN and CENELEC shall not be held responsible for identifying any or all such patent rights. The following dates were fixed: – latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement
(dop)
2010-11-01 – latest date by which the national standards conflicting
with the EN have to be withdrawn
(dow)
2013-02-01 Annex ZA has been added by CENELEC. __________ Endorsement notice The text of the International Standard IEC 60191-9-18:2010 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following notes have to be added for the standards indicated: IEC 60191-6-2 NOTE
Harmonized as EN 60191-6-2. IEC 60191-6-4 NOTE
Harmonized as EN 60191-6-4. IEC 60191-6-5 NOTE
Harmonized as EN 60191-6-5. __________
- 3 - EN 60191-6-18:2010
Annex ZA
(normative)
Normative references to international publications with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
NOTE
When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies.
Publication Year Title EN/HD Year
IEC 60191-6 - Mechanical standardization of
semiconductor devices -
Part 6: General rules for the preparation
of outline drawings of surface mounted semiconductor device packages EN 60191-6 -
IEC 60191-6-18Edition 1.0 2010-01INTERNATIONAL STANDARD NORME INTERNATIONALEMechanical standardization of semiconductor devices –
Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages – Design guide for ball grid array (BGA)
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-18: Règles générales pour la préparation des dessins d’encombrement des dispositifs à semiconducteurs pour montage en surface – Guide de conception pour les boîtiers matriciels à billes (BGA)
INTERNATIONAL ELECTROTECHNICAL COMMISSION COMMISSION ELECTROTECHNIQUE INTERNATIONALE RICS 31.080.01 PRICE CODECODE PRIXISBN 2-8318-1074-0
– 2 – 60191-6-18 © IEC:2010 CONTENTS FOREWORD.3 1 Scope.5 2 Normative references.5 3 Terms and definitions.5 4 Terminal position numbering.6 5 Nominal package dimension.6 6 Symbols and drawings.7 7 Dimensions.10 8 Recommended BGA variations.16 Bibliography.20
Figure 1 – Cavity down type.7 Figure 2 – Cavity up type.8 Figure 3 – Pattern of terminal position areas.9 Figure 4 – Example of the terminal depopulations.15
Table 1 – Group 1: Dimensions appropriate to mounting and interchangeability.10 Table 2 – Group 2: Dimensions appropriate to mounting and gauging.13 Table 3 – Combinations of D, E, e, MD, ME, and n.14 Table 4 – P-BGA (Cavity up) 1,27 mm pitch.16 Table 5 – P-BGA (Cavity up) 1,0 mm pitch.16 Table 6 – P-BGA (Cavity down) 1,27 mm pitch.18 Table 7 – T-BGA 1,27 mm pitch.18 Table 8 – T-BGA 1,0 mm pitch.19 Table 9 – P-BGA and C-BGA (Flip-chip interconnection)
1,0 mm pitch.19
60191-6-18 © IEC:2010 – 3 – INTERNATIONAL ELECTROTECHNICAL COMMISSION ____________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-18: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for ball grid array (BGA)
FOREWORD 1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, IEC publishes International Standards, Technical Specifications, Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely with the International Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each technical committee has representation from all interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any misinterpretation by any end user. 4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications transparently to the maximum extent possible in their national and regional publications. Any divergence between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in the latter. 5) IEC itself does not provide any attestation of conformity. Independent certification bodies provide conformity assessment services and, in some areas, access to IEC marks of conformity. IEC is not responsible for any services carried out by independent certification bodies. 6) All users should ensure that they have the latest edition of this publication. 7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and members of its technical committees and IEC National Committees for any personal injury, property damage or other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is indispensable for the correct application of this publication. 9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent rights. IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60191-6-18 has been prepared by subcommittee 47D: Mechanical standardization for semiconductor devices, of IEC technical committee 47: Semiconductor devices. This standard cancels and replaces IEC/PAS 60191-6-18 published in 2008. This first edition constitutes a technical revision. The text of this standard is based on the following documents: FDIS Report on voting 47D/753A/FDIS 47D/758/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. SIST EN 60191-6-18:2010

– 4 – 60191-6-18 © IEC:2010 This publication has been drafted in accordance with the ISO/IEC Directives, Part 2. A list of all the parts in the IEC 60191 series, under the general title Mechanical standardization of semiconductor devices, can be found on the IEC website. The committee has decided that the contents of this publication will remain unchanged until the maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in the data related to the specific publication. At this date, the publication will be
• reconfirmed, • withdrawn, • replaced by a revised edition, or • amended.
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