SIST EN 60191-6-2:2005
(Main)Mechanical standardization of semiconductor devices -- Part 6-2: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages
Mechanical standardization of semiconductor devices -- Part 6-2: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages
Covers the requirements for the preparation of drawings of integrated circuit outlines for the various ball and column terminal packages.
Mechanische Normung von Halbleiterbauelementen -- Teil 6-2: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Gehäuse mit Kugel- und Säulenanschlüssen in einem Raster von 1,50 mm, 1,27 mm und 1,00 mm
Normalisation mécanique des disposifs à semiconducteurs -- Part 6-2: Règles générales pour la préparation des dessins d'encombrement des dispositifs à semiconducteurs pour montage en surface - Guide de conception pour les boîtiers à broches en forme de billes et de colonnes, avec des pas de 1,50 mm, 1,27 mm et 1,00 mm
La CEI 60191-6-2:2001 couvre les exigences de préparation des dessins d'encombrement de circuits intégrés pour les divers boîtiers à bornes en forme de billes, par exemple boîtiers matriciels à billes en céramique (C-BGA), boîtiers matriciels à billes en plastique (P-BGA), boîtiers matriciels à billes sur bande (T-BGA) et autres, et aussi boîtiers à bornes en forme de colonnes, par exemple boîtiers matriciels à colonnes en céramique (C-CGA).
Standardizacija mehanskih lastnosti polprevodniških elementov – 6-2. del: Splošna pravila za pripravo tehničnih risb okrovov polprevodniških elementov za površinsko montažo - Vodilo za konstruiranje okrovov s krogličnimi in stebričnimi priključki v rastru 1,50 mm, 1,27 mm in 1,00 mm (IEC 60191-2-6:2001)
General Information
Overview
EN 60191-6-2:2002 (adopted from IEC 60191-6-2:2001) is a CENELEC/CLC mechanical standardization guide for preparing outline drawings of surface-mounted semiconductor device packages with ball and column terminals at 1.50 mm, 1.27 mm and 1.00 mm pitch. It standardizes the presentation and key dimensional requirements used for integrated-circuit outline drawings (e.g., C‑BGA, P‑BGA, T‑BGA, C‑CGA) to ensure mechanical interchangeability, assembly compatibility and clear communication across design, manufacturing and procurement.
Key Topics and Requirements
- Scope and definitions: Covers ball terminal packages (BGA variants) and column terminal packages (C‑CGA), and defines terms used in outline drawings.
- Design guide by pitch: Specific guidance for 1.00 mm, 1.27 mm and 1.50 mm terminal pitches.
- Nominal terminal dimensions: Prescribes nominal diameters and shapes for solder balls and solder columns (see standard tables).
- Tolerance data: Specifies tolerances for terminal centre position, X/Y offsets and coplanarity to control planarity and alignment between package and PCB.
- Package heights and stand‑off: Defines package body thickness, lid and stand‑off heights (A, A1, A2, etc.) and their relationships for each package type.
- Solder type distinctions: Differentiates parameters for low melting point (LMP) and high melting point (HMP) solder materials where applicable.
- Reference tables and drawings: Includes normative tables (Tables 1–8) and reference characters/drawings for consistent outline drawing preparation.
- Normative references and annex: References the IEC 60191 series and includes CENELEC normative annexes (e.g., annex ZA).
Practical Applications
- Creating standardized outline drawings and mechanical datasheets for BGA/CGA packages.
- Defining PCB footprint constraints and assembly clearances for surface-mount technology (SMT).
- Specifying manufacturing tolerances for package suppliers and contract manufacturers.
- Supporting quality control (coplanarity checks, terminal position verification) and incoming inspection criteria.
- Facilitating cross‑vendor interchangeability and procurement of packaged semiconductor devices.
Who Should Use This Standard
- Package and semiconductor mechanical designers
- PCB layout and assembly engineers (SMT process planners)
- Component suppliers and test houses
- Draftspeople preparing outline drawings and datasheets
- Standards and compliance teams in electronics manufacturing
Related Standards
- IEC 60191 (all parts): the broader mechanical standardization series for semiconductor devices - EN 60191-6-2 references the IEC 60191 family as normative.
Keywords: EN 60191-6-2:2002, IEC 60191-6-2, BGA outline drawing, CGA package, surface-mounted semiconductor packages, 1.27 mm pitch, coplanarity, solder ball diameter, package stand-off.
Frequently Asked Questions
SIST EN 60191-6-2:2005 is a standard published by the Slovenian Institute for Standardization (SIST). Its full title is "Mechanical standardization of semiconductor devices -- Part 6-2: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball and column terminal packages". This standard covers: Covers the requirements for the preparation of drawings of integrated circuit outlines for the various ball and column terminal packages.
Covers the requirements for the preparation of drawings of integrated circuit outlines for the various ball and column terminal packages.
SIST EN 60191-6-2:2005 is classified under the following ICS (International Classification for Standards) categories: 01.100.25 - Electrical and electronics engineering drawings; 31.080.01 - Semiconductor devices in general; 31.240 - Mechanical structures for electronic equipment. The ICS classification helps identify the subject area and facilitates finding related standards.
You can purchase SIST EN 60191-6-2:2005 directly from iTeh Standards. The document is available in PDF format and is delivered instantly after payment. Add the standard to your cart and complete the secure checkout process. iTeh Standards is an authorized distributor of SIST standards.
Standards Content (Sample)
SLOVENSKI SIST EN 60191-6-2:2005
STANDARD
marec 2005
Standardizacija mehanskih lastnosti polprevodniških elementov – 6-2. del:
Splošna pravila za pripravo tehničnih risb okrovov polprevodniških elementov
za površinsko montažo - Vodilo za konstruiranje okrovov s krogličnimi in
stebričnimi priključki v rastru 1,50 mm, 1,27 mm in 1,00 mm (IEC 60191-2-
6:2001)
Mechanical standardization of semiconductor devices - Part 6-2: General rules for
the preparation of outline drawings of surface mounted semiconductor device
packages - Design guide for 1, 50 mm, 1, 27 mm and 1, 00 mm pitch ball and
column terminal packages (IEC 60191-2-6:2001)
ICS 31.080.01; 31.240 Referenčna številka
© Standard je založil in izdal Slovenski inštitut za standardizacijo. Razmnoževanje ali kopiranje celote ali delov tega dokumenta ni dovoljeno
EUROPEAN STANDARD EN 60191-6-2
NORME EUROPÉENNE
EUROPÄISCHE NORM February 2002
ICS 31.080.01
English version
Mechanical standardization of semiconductor devices
Part 6-2: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages -
Design guide for 1,50 mm, 1,27 mm and 1,00 mm
pitch ball and column terminal packages
(IEC 60191-6-2:2001)
Normalisation mécanique des Mechanische Normung von
disposifs à semiconducteurs Halbleiterbauelementen
Part 6-2: Règles générales pour la Teil 6-2: Allgemeine Regeln für
préparation des dessins d'encombrement die Erstellung von Gehäusezeichnungen
des dispositifs à semiconducteurs pour von SMD-Halbleitergehäusen -
montage en surface - Konstruktionsleitfaden für Gehäuse
Guide de conception pour les boîtiers mit Kugel- und Säulenanschlüssen
à broches en forme de billes in einem Raster von
et de colonnes, avec des pas de 1,50 mm, 1,27 mm und 1,00 mm
1,50 mm, 1,27 mm et 1,00 mm (IEC 60191-6-2:2001)
(CEI 60191-6-2:2001)
This European Standard was approved by CENELEC on 2002-02-01. CENELEC members are bound to
comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European
Standard the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and
notified to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Czech Republic,
Denmark, Finland, France, Germany, Greece, Iceland, Ireland, Italy, Luxembourg, Malta, Netherlands,
Norway, Portugal, Spain, Sweden, Switzerland and United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
Central Secretariat: rue de Stassart 35, B - 1050 Brussels
© 2002 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 60191-6-2:2002 E
Foreword
The text of document 47D/460/FDIS, future edition 1 of IEC 60191-6-2, prepared by SC 47D,
Mechanical standardization of semiconductor devices, of IEC TC 47, Semiconductor devices, was
submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-2 on
2002-02-01.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2002-11-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2005-02-01
Annexes designated "normative" are part of the body of the standard.
In this standard, annex ZA is normative.
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 60191-6-2:2001 was approved by CENELEC as a European
Standard without any modification.
__________
- 3 - EN 60191-6-2:2002
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
This European Standard incorporates, by dated or undated reference, provisions from other
publications. These normative references are cited at the appropriate places in the text and the
publications are listed hereafter. For dated references, subsequent amendments to or revisions of any
of these publications apply to this European Standard only when incorporated in it by amendment or
revision. For undated references, the latest edition of the publication referred to applies (including
amendments).
NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant
EN/HD applies.
Publication Year Title EN/HD Year
IEC 60191 Series Mechanical standardization of EN 60191 Series
semiconductor devices
INTERNATIONAL IEC
STANDARD
60191-6-2
First edition
2001-12
Mechanical standardization of semiconductor
devices –
Part 6-2:
General rules for the preparation of outline
drawings of surface mounted semiconductor
device packages –
Design guide for 1,50 mm, 1,27 mm and 1,00 mm
pitch ball and column terminal packages
Normalisation mécanique des dispositifs à semiconducteurs –
Partie 6-2:
Règles générales pour la préparation des dessins
d'encombrement des dispositifs à semiconducteurs
pour montage en surface –
Guide de conception pour les boîtiers à broches
en forme de billes et de colonnes, avec des pas
de 1,50 mm, 1,27 mm et 1,00 mm
IEC 2001 Copyright - all rights reserved
No part of this publication may be reproduced or utilized in any form or by any means, electronic or
mechanical, including photocopying and microfilm, without permission in writing from the publisher.
International Electrotechnical Commission 3, rue de Varembé Geneva, Switzerland
Telefax: +41 22 919 0300 e-mail: inmail@iec.ch IEC web site http://www.iec.ch
Commission Electrotechnique Internationale
PRICE CODE
K
International Electrotechnical Commission
For price, see current catalogue
– 2 – 60191-6-2 IEC:2001(E)
INTERNATIONAL ELECTROTECHNICAL COMMISSION
___________
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES –
Part 6-2: General rules for the preparation of outline drawings
of surface mounted semiconductor device packages –
Design guide for 1,50 mm, 1,27 mm and 1,00 mm pitch ball
and column terminal packages
FOREWORD
1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of the IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, the IEC publishes International Standards. Their preparation is
entrusted to technical committees; any IEC National Committee interested in the subject dealt with may
participate in this preparatory work. International, governmental and non-governmental organizations liaising
with the IEC also participate in this preparation. The IEC collaborates closely with the International
Organization for Standardization (ISO) in accordance with conditions determined by agreement between the
two organizations.
2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an
international consensus of opinion on the relevant subjects since each technical committee has representation
from all interested National Committees.
3) The documents produced have the form of recommendations for international use and are published in the form
of standards, technical specifications, technical reports or guides and they are accepted by the National
Committees in that sense.
4) In order to promote international unification, IEC National Committees undertake to apply IEC International
Standards transparently to the maximum extent possible in their national and regional standards. Any
divergence between the IEC Standard and the corresponding national or regional standard shall be clearly
indicated in the latter.
5) The IEC pr
...
기사 제목: SIST EN 60191-6-2:2005 - 반도체 장치의 기계 표준화 -- 파트 6-2: 표면 실장 반도체 장치 패키지의 개요 도면 작성을 위한 일반 규칙 - 1,50 mm, 1,27 mm 및 1,00 mm 피치 볼과 컬럼 단자 패키지에 대한 설계 가이드 기사 내용: 다양한 볼과 컬럼 단자 패키지에 대한 통합 회로 개요 도면 작성 요구 사항에 대해 논의합니다. 이 표준은 1.50mm, 1.27mm, 1.00mm 피치를 가진 패키지의 볼과 컬럼 단자를 위한 설계 가이드를 다룹니다. 해당 표준은 이러한 유형의 패키지에 대한 통합 회로 개요 도면 작성 요구 사항을 확립하는 것을 목표로 합니다.
The article discusses a mechanical standardization for semiconductor devices, specifically focusing on the preparation of outline drawings of surface mounted semiconductor device packages. It covers the design guide for packages with ball and column terminals, with pitches of 1.50 mm, 1.27 mm, and 1.00 mm. The standard aims to establish the requirements for drawing preparation for integrated circuit outlines in these types of packages.
記事タイトル: SIST EN 60191-6-2:2005 - 半導体デバイスの機械標準化 -- 第6-2部: 表面実装型半導体デバイスパッケージの輪郭図作成のための一般的な規則 - 1.50 mm、1.27 mm、および1.00 mmピッチのボールおよびコラム端子パッケージの設計ガイド 記事の内容: 異なるボールおよびコラム端子パッケージのインテグレーテッド回路の輪郭図作成の要件について説明しています。1.50 mm、1.27 mm、1.00 mmピッチのパッケージについての設計ガイドをカバーしています。この標準は、これらのタイプのパッケージにおける回路輪郭図の作成要件を確立することを目指しています。








Questions, Comments and Discussion
Ask us and Technical Secretary will try to provide an answer. You can facilitate discussion about the standard in here.
Loading comments...