SIST EN 62258-1:2011
Semiconductor die products - Part 1: Procurement and use (IEC 62258-1:2009)
Semiconductor die products - Part 1: Procurement and use (IEC 62258-1:2009)
IEC 62258-1:2009 has been developed to facilitate the production, supply and use of semiconductor die products, including: - wafers, - singulated bare die, - die and wafers with attached connection structures, - minimally or partially encapsulated die and wafers. This standard defines the minimum requirements for the data that are needed to describe such die products and is intended as an aid to the design of and procurement for assemblies incorporating die products. It covers the requirements for data, including: - product identity, - product data, - die mechanical information, - test, quality, assembly and reliability information, - handling, shipping and storage information. The main changes that have been introduced in this edition have been to ensure consistency across all parts of the standard. The ordering of the subclauses, particularly in Clause 6, has been changed to be more logical and the text of some of the requirements has been amended to add requirements on further information as covered by IEC/TR 62258-4, IEC/TR 62258-7 and IEC/TR 62258-8. New requirements include information on permutability of terminals and functional elements (6.6.4) and moisture sensitivity for partially encapsulated devices (8.8).
Halbleiter-Chip-Erzeugnisse - Teil 1: Beschaffung und Anwendung (IEC 62258-1:2009)
Produits de puces de semiconducteurs - Partie 1: Approvisionnement et utilisation (CEI 62258-1:2009)
La CEI 62258-1:2009 a été élaborée afin de faciliter la production, la fourniture et l'utilisation de produits de puces de semi-conducteurs, y compris: - lest tranches, - les puces nues isolées, - les puces et tranches munies de leurs structures de connexion, - les puces et tranches à encapsulation minimale ou partielle. Cette norme définit les exigences minimales applicables aux données nécessaires à la description desdits produits de puces et constitue une aide à la conception et à l'approvisionnement d'ensembles intégrant des produits de puces. Les exigences ainsi couvertes comprennent: - l'identification du produit, - les données du produit, - les informations mécaniques concernant les puces, - les informations concernant les essais, la qualité, l'assemblage et la fiabilité, - les informations relatives à la manifulation, à l'expédition et au stockage. Les principales modifications ayant été introduites dans la présente édition sont destinées à assurer la cohérence entre toutes les parties de la norme. L'ordre des paragraphes, notamment à l'Article 6, a été modifié de manière à être plus logique, et le texte de certaines des exigences, a été amendé de manière à ajouter les exigences relatives aux informations supplémentaires objet de la CEI/TR 62258-4, de la CEI/TR 62258-7 et de la CEI/TR 62258-8. Les nouvelles exigences comprennent les informations sur la permutabilité des bornes et des éléments fonctionnels (6.6.4) et surla sensibilité à l'humidité des dispositifs partiellement encapsulés (8.8).
Izdelki iz polprevodniških čipov - 1. del: Nabava in uporaba (IEC 62258-1:2009)
Ta del IEC 62258 je bil razvit, da olajšuje proizvodnjo, nabavo in uporabo izdelkov iz polprevodniških čipov, vključno s/z – ploščicami, - individualnimi nepokritimi čipi – čipi in ploščicami s pritrjenimi povezovalnimi strukturami; - minimalno ali delno inkapsuliranimi čipi in ploščicami. Ta standard opredeljuje minimalne zahteve za podatke, ki so potrebni za opis teh izdelkov iz čipov, ter je namenjen v pomoč načrtovanju in naročevanju sklopov, ki vsebujejo izdelke iz čipov. Zajema zahteve za podatke, vključno s/z – prepoznavanje izdelka – podatke o izdelku – informacije o mehanskih lastnosti čipov – informacije o preskušanju, montaži in zanesljivosti – informacije o rokovanju, odpremi in shranjevanju. Zajema posebne zahteve za podatke, ki so potrebni za opis geometričnih lastnosti čipov, njihovih fizičnih lastnosti in načine povezave, ki so potrebni za njihovo uporabo pri razvoju in proizvodnji izdelkov. Prav tako v dodatkih zajema slovar in seznam skupnih akronimov.
General Information
Relations
Standards Content (Sample)
SLOVENSKI STANDARD
01-januar-2011
1DGRPHãþD
SIST EN 62258-1:2007
,]GHONLL]SROSUHYRGQLãNLKþLSRYGHO 1DEDYDLQXSRUDED ,(&
Semiconductor die products - Part 1: Procurement and use (IEC 62258-1:2009)
Halbleiter-Chip-Erzeugnisse - Teil 1: Beschaffung und Anwendung (IEC 62258-1:2009)
Produits de puces de semiconducteurs - Partie 1: Approvisionnement et utilisation (CEI
62258-1:2009)
Ta slovenski standard je istoveten z: EN 62258-1:2010
ICS:
31.080.99 Drugi polprevodniški elementi Other semiconductor devices
31.200 Integrirana vezja, Integrated circuits.
mikroelektronika Microelectronics
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.
EUROPEAN STANDARD
EN 62258-1
NORME EUROPÉENNE
October 2010
EUROPÄISCHE NORM
ICS 31.080.99 Supersedes EN 62258-1:2005
English version
Semiconductor die products -
Part 1: Procurement and use
(IEC 62258-1:2009)
Produits de puces de semiconducteurs - Halbleiter-Chip-Erzeugnisse -
Partie 1: Approvisionnement et utilisation Teil 1: Beschaffung und Anwendung
(CEI 62258-1:2009) (IEC 62258-1:2009)
This European Standard was approved by CENELEC on 2010-10-01. CENELEC members are bound to comply
with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard
the status of a national standard without any alteration.
Up-to-date lists and bibliographical references concerning such national standards may be obtained on
application to the Central Secretariat or to any CENELEC member.
This European Standard exists in three official versions (English, French, German). A version in any other
language made by translation under the responsibility of a CENELEC member into its own language and notified
to the Central Secretariat has the same status as the official versions.
CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus,
the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy,
Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia,
Spain, Sweden, Switzerland and the United Kingdom.
CENELEC
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
Management Centre: Avenue Marnix 17, B - 1000 Brussels
© 2010 CENELEC - All rights of exploitation in any form and by any means reserved worldwide for CENELEC members.
Ref. No. EN 62258-1:2010 E
Foreword
The text of document 47/1974/CDV, future edition 2 of IEC 62258-1, prepared by IEC TC 47,
Semiconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by
CENELEC as EN 62258-1 on 2010-10-01.
This European Standard supersedes EN 62258-1:2005.
The main changes that have been introduced in this issue have been to ensure consistency across all
parts of the standard. The ordering of the subclauses, particularly in Clause 6, has been changed to be
more logical and the text of some of the requirements has been amended to add requirements on further
information as covered by CLC/TR 62258-4, CLC/TR 62258-7 and CLC/TR 62258-8. New requirements
include information on permutability of terminals and functional elements (6.6.4) and moisture sensitivity
for partially encapsulated devices (8.8).
Attention is drawn to the possibility that some of the elements of this document may be the subject of
patent rights. CEN and CENELEC shall not be held responsible for identifying any or all such patent
rights.
The following dates were fixed:
– latest date by which the EN has to be implemented
at national level by publication of an identical
national standard or by endorsement (dop) 2011-07-01
– latest date by which the national standards conflicting
with the EN have to be withdrawn (dow) 2013-10-01
Annex ZA has been added by CENELEC.
__________
Endorsement notice
The text of the International Standard IEC 62258-1:2009 was approved by CENELEC as a European
Standard without any modification.
In the official version, for Bibliography, the following notes have to be added for the standards indicated:
IEC 60068 series NOTE Harmonized in EN 60068 series (not modified).
IEC 60749-26 NOTE Harmonized as EN 60749-26.
IEC 60749-27 NOTE Harmonized as EN 60749-27.
IEC 61340-5-1 NOTE Harmonized as EN 61340-5-1.
IEC 61340-5-2 NOTE Harmonized as EN 61340-5-2.
IEC 61340-5-2 NOTE Harmonized as EN 61340-5-2.
ISO 9000 NOTE Harmonized as EN ISO 9000.
__________
- 3 - EN 62258-1:2010
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications
The following referenced documents are indispensable for the application of this document. For dated
references, only the edition cited applies. For undated references, the latest edition of the referenced
document (including any amendments) applies.
NOTE When an international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD
applies.
Publication Year Title EN/HD Year
IEC 60050 Series International Electrotechnical Vocabulary - -
(IEV)
IEC 60191 Series Mechanical standardization of semiconductor EN 60191 Series
devices
IEC 60191-4 1999 Mechanical standardization of semiconductor EN 60191-4 1999
+ A1 2001 devices - + A1 2002
+ A2 2002 Part 4: Coding system and classification into + A2 2002
forms of package outlines for semiconductor
device packages
IEC 61360-1 - Standard data elements types with EN 61360-1 -
associated classification scheme for electric
items -
Part 1: Definitions - Principles and methods
IEC 62258-2 - Semiconductor die products - EN 62258-2 -
Part 2: Exchange data formats
IEC/TR 62258-3 - Semiconductor die products - CLC/TR 62258-3 -
Part 3: Recommendations for good practice in
handling, packing and storage
IEC/TR 62258-4 - Semiconductor die products - CLC/TR 62258-4 -
Part 4: Questionnaire for die users and
suppliers
IEC 62258-5 - Semiconductor die products - EN 62258-5 -
Part 5: Requirements for information
concerning electrical simulation
IEC 62258-6 - Semiconductor die products - EN 62258-6 -
Part 6: Requirements for information
concerning thermal simulation
IEC/TR 62258-7 - Semiconductor die products - CLC/TR 62258-7 -
Part 7: XML schema for data exhange
IEC/TR 62258-8 - Semiconductor die products - CLC/TR 62258-8 -
Part 8: EXPRESS model schema for data
exchange
ISO 14644-1 1999 Cleanrooms and associated controlled EN ISO 14644-1 1999
environments -
Part 1: Classification of air cleanliness
IEC 62258-1 ®
Edition 2.0 2009-04
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Semiconductor die products –
Part 1: Procurement and use
Produits de puces de semiconducteurs –
Partie 1 : Approvisionnement et utilisation
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
PRICE CODE
INTERNATIONALE
X
CODE PRIX
ICS 31.080.99 ISBN 2-8318-1036-7
– 2 – 62258-1 © IEC:2009
CONTENTS
FOREWORD.5
INTRODUCTION.7
1 Scope.8
2 Normative references.8
3 Terms and definitions .9
3.1 Basic definitions .9
3.2 General terminology .10
3.3 Semiconductor manufacturing and interconnection terminology.12
4 General requirements .13
5 Data exchange .13
6 Requirements for all devices .14
6.1 Data package .14
6.1.1 General .14
6.1.2 Information source.14
6.1.3 Data version .14
6.1.4 Data exchange formats .14
6.2 Identity and source .14
6.2.1 General .14
6.2.2 Type number .14
6.2.3 Manufacturer .14
6.2.4 Supplier .14
6.2.5 Signature.14
6.3 Function .14
6.4 Physical characteristics .15
6.4.1 Semiconductor material .15
6.4.2 Technology.15
6.5 Ratings and limiting conditions.15
6.5.1 Power dissipation.15
6.5.2 Operating temperature .15
6.6 Connectivity.15
6.6.1 General .15
6.6.2 Terminal count.15
6.6.3 Terminal information .15
6.6.4 Permutability.16
6.7 Documentation .16
6.8 Form of supply.16
6.8.1 Physical form .16
6.8.2 Packing .16
6.9 Simulation and modelling .16
6.9.1 General .16
6.9.2 Electrical modelling and simulation.16
6.9.3 Thermal data and modelling.16
7 Requirements for bare die and wafers with or without connection structures .17
7.1 General .17
7.2 Identity .17
7.2.1 General .17
62258-1 © IEC:2009 – 3 –
7.2.2 Die name.17
7.2.3 Die version .17
7.3 Materials .17
7.3.1 Substrate material.17
7.3.2 Substrate connection .17
7.3.3 Backside detail .17
7.3.4 Passivation material.17
7.3.5 Metallisation .17
7.3.6 Terminal material.17
7.3.7 Terminal structure.18
7.3.8 Vias.18
7.4 Geometry .18
7.4.1 General .18
7.4.2 Units of measurement.18
7.4.3 Geometric view.18
7.4.4 Die size .18
7.4.5 Die thickness .18
7.4.6 Dimension tolerances .18
7.4.7 Geometric origin .18
7.4.8 Terminal shape and size .18
7.4.9 Die fiducials.19
7.4.10 Die picture .19
7.5 Wafer data .19
7.5.1 General .19
7.5.2 Wafer size .19
7.5.3 Wafer index .19
7.5.4 Wafer die count and step size .19
7.5.5 Wafer reticules .19
8 Minimally-packaged devices.19
8.1 General .19
8.2 Number of terminals .19
8.3 Terminal position .19
8.4 Terminal shape and size.20
8.5 Device size.20
8.6 Seated height .20
8.7 Encapsulation material.20
8.8 Moisture sensitivity .20
8.9 Package style code.20
8.10 Outline drawing.20
9 Quality, test and reliability .21
9.1 General .21
9.2 Outgoing quality level.21
9.2.1 Value.21
9.2.2 Description .21
9.3 Electrical parameters specified .21
9.4 Compliance to standards .21
9.5 Additional device screening .21
9.6 Product status .21
9.7 Testability features .21
– 4 – 62258-1 © IEC:2009
9.8 Additional test requirements.21
9.9 Reliability.22
9.9.1 Reliability estimate.22
9.9.2 Reliability calculation .22
10 Handling and packing .22
10.1 General requirements for all devices.22
10.1.1 General .22
10.1.2 Customer part number .22
10.1.3 Type number .23
10.1.4 Supplier .23
10.1.5 Manufacturer .23
10.1.6 Traceability.23
10.1.7 Quantity.23
10.1.8 ESD sensitivity.23
10.1.9 Requirements for environmental protection .23
10.2 Specific requirement for bare die or wafers – mask version .23
10.3 Specific requirement for wafers – wafer map.23
10.4 Special item requirements .23
10.4.1 General .23
10.4.2 Special protection requirements .24
10.4.3 Unencapsulated die warning label .24
10.4.4 Toxic material warning .24
10.4.5 Fragile components warning .24
10.4.6 ESD sensitivity warning.24
11 Storage .24
11.1 General .24
11.2 Storage duration and conditions.24
11.3 Long-term storage .24
11.4 Storage limitations .24
12 Assembly.25
12.1 General .25
12.2 Attach methods and materials.25
12.3 Bonding method and materials.25
12.4 Attachment limitations.25
12.4.1 General .25
12.4.2 Temperature/time profile.25
12.5 Process limitations .25
Annex A (informative) Terminology.26
Annex B (informative) Acronyms.36
Bibliography .43
62258-1 © IEC:2009 – 5 –
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________
SEMICONDUCTOR DIE PRODUCTS –
Part 1: Procurement and use
FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote
international co-operation on all questions concerning standardization in the electrical and electronic fields. To
this end and in addition to other activities, IEC publishes International Standards, Technical Specifications,
Technical Reports, Publicly Available Specifications (PAS) and Guides (hereafter referred to as “IEC
Publication(s)”). Their preparation is entrusted to technical committees; any IEC National Committee interested
in the subject dealt with may participate in this preparatory work. International, governmental and non-
governmental organizations liaising with the IEC also participate in this preparation. IEC collaborates closely
with the International Organization for Standardization (ISO) in accordance with conditions determined by
agreement between the two organizations.
2) The formal decisions or agreements of IEC on technical matters express, as nearly as possible, an international
consensus of opinion on the relevant subjects since each technical committee has representation from all
interested IEC National Committees.
3) IEC Publications have the form of recommendations for international use and are accepted by IEC National
Committees in that sense. While all reasonable efforts are made to ensure that the technical content of IEC
Publications is accurate, IEC cannot be held responsible for the way in which they are used or for any
misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees undertake to apply IEC Publications
transparently to the maximum extent possible in their national and regional publications. Any divergence
between any IEC Publication and the corresponding national or regional publication shall be clearly indicated in
the latter.
5) IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any
equipment declared to be in conformity with an IEC Publication.
6) All users should ensure that they have the latest edition of this publication.
7) No liability shall attach to IEC or its directors, employees, servants or agents including individual experts and
members of its technical committees and IEC National Committees for any personal injury, property damage or
other damage of any nature whatsoever, whether direct or indirect, or for costs (including legal fees) and
expenses arising out of the publication, use of, or reliance upon, this IEC Publication or any other IEC
Publications.
8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of
patent rights. IEC shall not be held responsible for identifying any or all such patent rights.
International Standard IEC 62258-1 has been prepared by IEC technical committee 47:
Semiconductor devices.
This second edition cancels and replaces the first edition published in 2005, and constitutes a
technical revision.
The main changes that have been introduced in this issue have been to ensure consistency
across all parts of the standard. The ordering of the subclauses, particularly in Clause 6, has
been changed to be more logical and the text of some of the requirements has been amended
to add requirements on further information as covered by IEC/TR 62258-4, IEC/TR 62258-7
and IEC/TR 62258-8. New requirements include information on permutability of terminals and
functional elements (6.6.4) and moisture sensitivity for partially encapsulated devices (8.8).
– 6 – 62258-1 © IEC:2009
The text of this standard is based on the following documents:
CDV Report on voting
47/1974/CDV 47/2004/RVC
Full information on the voting for the approval of this standard can be found in the report on
voting indicated in the above table.
This publication has been drafted in accordance with the ISO/IEC Directives, Part 2.
A list of all the parts in the IEC 62258 series, under the general title Semiconductor die
products, can be found on the IEC website.
The committee has decided that the contents of this publication will remain unchanged until the
maintenance result date indicated on the IEC web site under "http://webstore.iec.ch" in the data
related to the specific publication. At this date, the publication will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.
62258-1 © IEC:2009 – 7 –
INTRODUCTION
th
This standard is based on the work carried out in the ESPRIT 4 Framework project GOOD-
DIE which resulted in the publication of the ES59008 series of European specifications.
Organisations that helped prepare this document included the European IST ENCASIT project,
JEITA, JEDEC and ZVEI.
The structure of this International Standard as currently conceived is as follows:
Part 1: Procurement and use
Part 2: Exchange data formats
Part 3: Recommendations for good practice in handling, packing and storage (technical
report)
Part 4: Questionnaire for die users and suppliers (technical report)
Part 5: Requirements for information concerning electrical simulation
Part 6: Requirements for information concerning thermal simulation
Part 7: XML schema for data exchange (technical report)
Part 8: EXPRESS model schema for data exchange (technical report)
Further parts may be added as required.
– 8 – 62258-1 © IEC:2009
SEMICONDUCTOR DIE PRODUCTS –
Part 1: Procurement and use
1 Scope
This part of IEC 62258 has been developed to facilitate the production, supply and use of
semiconductor die products, including
• wafers,
• singulated bare die,
• die and wafers with attached connection structures,
• minimally or partially encapsulated die and wafers.
The standard defines the minimum requirements for the data that are needed to describe such
die products and is intended as an aid to the design of and procurement for assemblies
incorporating die products. It covers the requirements for data, including
• product identity
• product data
• die mechanical information
• test, quality, assembly and reliability information
• handling, shipping and storage information
It covers the specific requirements for the data that are needed to describe the geometrical
properties of die, their physical properties and the means of connection necessary for their use
in the development and manufacture of products. It also contains, in the annexes, a vocabulary
and list of common acronyms.
2 Normative references
The following referenced documents are indispensable for the application of this document. For
dated references, only the edition cited applies. For undated references, the latest edition of the
referenced document (including any amendments) applies.
IEC 60050 (all parts), International Electrotechnical Vocabulary
IEC 60191 (all parts), Mechanical standardization of semiconductor devices
IEC 60191-4:1999, Mechanical standardization of semiconductor devices – Part 4: Coding
system and classification into forms of package outlines for semiconductor device packages
Amendment 1 (2001)
Amendment 2 (2002)
IEC 61360-1, Standard data element types with associated classification scheme for electric
components – Part 1: Definitions – Principles and methods
IEC 62258-2, Semiconductor die products – Part 2: Exchange data formats
IEC/TR 62258-3, Semiconductor die products – Part 3: Recommendations for good practice in
handling, packing and storage
62258-1 © IEC:2009 – 9 –
IEC/TR 62258-4, Semiconductor die products – Part 4: Questionnaire for die users and
suppliers
IEC 62258-5, Semiconductor die products – Part 5: Requirements for information concerning
electrical simulation
IEC 62258-6, Semiconductor die products – Part 6: Requirements for information concerning
thermal simulation
IEC/TR 62258-7, Semiconductor die products – Part 7: XML schema for data exchange
IEC/TR 62258-8, Semiconductor die products – Part 8: EXPRESS model schema for data
exchange
ISO 14644-1:1999, Cleanrooms and associated controlled environments – Part 1: Classification
of air cleanliness
3 Terms and definitions
For the purpose of this document, the following terms and definitions are applicable. All the
terms and definitions defined here are in addition to the relevant terms and definitions that are
defined in IEC 60050 series . Additional terms and acronyms are given for information in
Annexes A and B.
3.1 Basic definitions
3.1.1
die (singular or plural)
separated piece(s) of semiconductor wafer that constitute a discrete semiconductor or whole
integrated circuit
3.1.2
wafer
slice or flat disc, either of semiconductor material or of such a material deposited on a
substrate, in which devices or circuits are simultaneously processed and which may be
subsequently separated into die
3.1.3
singulated die
individual and distinct die which have been separated from the wafer
3.1.4
singulation
die separation
separation of wafers into individual die devices, including sawing, scribing and dicing
3.1.5
bare die
unpackaged discrete semiconductor or integrated circuit with pads on the upper surface
suitable for interconnection to the substrate or package
___________
The terms in this series are available at www.Electropedia.org, also known as the “IEV On line”.
– 10 – 62258-1 © IEC:2009
3.1.6
bare die with connection structures
unpackaged die that have had added bumps, lead frames or other terminations to interconnect
for electrical attachment
NOTE Typically these can be die that have had solder or other metallic bumps added to the metallised pads on
the die in the form of peripheral bumps or arrays (also known as flip-chip) or die that have had fine leads attached
to the metallised pads on the die known as TAB.
3.1.7
minimally-packaged die
MPD
die that have had some exterior packaging medium and interconnection structure added for
protection and ease of handling
NOTE This definition includes such packaging technologies as Chip Scale Package (CSP) and Wafer Level
Package (WLP) in which the area of the package is not significantly greater than the area of the bare die.
3.1.8
die device
bare die, with or without connection structures, or a minimally-packaged die
3.1.9
data package
aggregate of information on a die device produced in compliance with this standard
3.2 General terminology
3.2.1
chip
common parlance for die
3.2.2
chip scale package
chip size package
CSP
generic term for packaging technologies that result in a packaged part that is only marginally
larger than the internal die
3.2.3
wafer level package
WLP
generic term for packaging technologies in which the encapsulation and any interconnection
structures are added to the wafer before separation into individual die
3.2.4
discrete (semiconductor)
single two-, three- or four-terminal semiconductor device
NOTE Discrete semiconductors include such devices as individual diodes, transistors and thyristors.
3.2.5
hybrid (circuit)
module or encapsulated sub-assembly that comprises semiconductor die and printed or
otherwise attached passive components
NOTE Also see multi-chip module and multi-chip package.
62258-1 © IEC:2009 – 11 –
3.2.6
known good die
KGD
qualification of a semiconductor die which indicates that the die has been tested to a specified
or determined level of quality or “goodness”
NOTE A commonly accepted definition of KGD is a die that has been tested and/or screened to quality levels that
are of the same order as those applicable to the equivalent packaged parts.
3.2.7
package
total assembly which protects one or more electronic components from mechanical,
environmental and electrical damage throughout its operational life and which provides means
of interconnection
3.2.8
packaging
process of assembling one or more electronic components into a package
NOTE The use of “packaging” as a participle (e.g. “When packaging ICs into dual-in-line packages …”) is
deprecated.
3.2.9
packing
material which is used to protect electronic items from mechanical, environmental and
electrical damage during transportation or storage and which is discarded prior to the
incorporation of the item into its end application
3.2.10
multi-chip module
MCM
module that contains two or more die and/or minimally-packaged die
NOTE Also see hybrid 3.2.5 and multi-chip package 3.2.11.
3.2.11
multi-chip package
MCP
package that contains two or more die and/or minimally-packaged die
NOTE Also see hybrid (3.2.5) and multi-chip module (3.2.10).
3.2.12
system in a package
SiP
functional system or sub-system in a single package that contains two or more die devices that
individually perform separate system functions
3.2.13
multi-device sub-assembly
MDS
sub-system which consists of multiple electronic devices including at least one integrated
circuit
NOTE This is a generic term which includes, among others, hybrid, MCM, MCP and SiP.
3.2.14
pad
conducting feature on a die device forming a terminal to which external electrical connections
are made
– 12 – 62258-1 © IEC:2009
NOTE For bare die without external connections, the pad acts as the terminal itself. For bumped die the terminal
is in the form of additional conducting material placed on a pad whilst for die with attached lead frame the terminal
is in the form of a conductor connected to the pad and extending from the die.
3.3 Semiconductor manufacturing and interconnection terminology
3.3.1
mask
a) optical overlay used in photo-etching during the process of semiconductor fabrication
b) major individual patterning stages that are used within the fabrication process
3.3.2
layer
level in the interconnection structure on a die device
3.3.3
passivation
top or final processing and covering on a die, usually of semiconductor oxide or nitride, that
protects and seals the active areas of the die from further external chemical or mechanical
contamination
NOTE Bond pads require an opening in this passivation to allow electrical contact.
3.3.4
scribe line
scribe lane
area surrounding the die that is set aside on the wafer for the purposes of scribing and sawing
the die from the wafer
NOTE This feature may be covered by many other terms such as scribe street, saw lane, dicing lane etc.
3.3.5
wire bonding
process of attaching interconnection wire or ribbon to a die
3.3.6
bond pads
metallised areas on the die that are used for temporary or permanent electrical connection
(bonding)
3.3.7
bump
pillar
post
column
raised metallised area on the die that is used for temporary or permanent electrical connection
3.3.8
lead frame
supporting structure upon which a die is mounted and which also includes the connection
structure to which the die is bonded
3.3.9
die attach
method and materials used to attach a die to a substrate
3.3.10
flip-chip
semiconductor die which is electrically and/or mechanically connected to an interconnection
structure in such a way that the active area faces the interconnection structure
62258-1 © IEC:2009 – 13 –
3.3.11
interposer
material placed between two surfaces giving electrical insulation, mechanical strength and/or
controlled mechanical separation between the two surfaces
NOTE An interposer may be used as a means for redistributing electrical connections and/or allowing for different
thermal expansions between adjacent surfaces.
3.3.12
redistribution
process of moving terminals on die to more convenient positions by additional connectivity
layers or by the use of an interposer
3.3.13
die stacking
wafer stacking
placing of die or wafers on top of each other to form a three dimensional stack die stacking
NOTE 1 Die are interconnected by wire-bonding, edge plating or printing, or by using through silicon vias.
NOTE 2 Die or wafers may be stacked back to face and/or face to face.
3.3.14
through silicon via
TSV
interconnection structure made through the semiconductor material of the die device from one
surface of the device to the other
NOTE The via may also have a bump, pillar or post attached to either or both sides to enable stacking of the die,
or the via itself may form a copper nail.
4 General requirements
Suppliers of die devices shall furnish, in a data package, information that is necessary and
sufficient for users of the devices at all stages of design, procurement, manufacture and test of
products containing them. Details of the requirements are given below and in other parts of this
standard.
Whilst it is expected that much of the information supplied in conformance with this
International Standard will be in the public domain and available from such sources as
manufacturers’ data sheets, this specification does not place an obligation on a supplier to
make information public. Any information that a supplier considers to be proprietary or
commercially sensitive may be supplied under the terms of a non-disclosure agreement.
For further details of requirements, refer to Clauses 6 to 12.
5 Data exchange
It is recommended that data intended for exchange by electronic means should be formatted in
accordance with the provisions of IEC 62258-2, IEC/TR 62258-7 and IEC/TR 62258-8. The
questionnaire in IEC/TR 62258-4, and the associated spreadsheet, may be used as an aid to
compliance with the requirements of this part of the standard with the possibility of converting
the spreadsheet content into one of the exchange formats.
– 14 – 62258-1 © IEC:2009
6 Requirements for all devices
6.1 Data package
6.1.1 General
Information on the data package itself shall be supplied, including sources of the information,
its version and corresponding dates.
6.1.2 Information source
The identity of the organisation or individual responsible for creating the data set shall be given.
6.1.3 Data version
The version and/or date of creation of the data set shall be given.
6.1.4 Data exchange formats
Where the data are supplied in a form suitable for data exchange using a defined schema, the
identity and version of the schema shall be stated. In addition, if the data were produced by a
software package, the identity and version of the software should also be given.
NOTE For information on suitable defined schemas, reference should be made to IEC 62258-2, IEC/TR 62258-7
and IEC/TR 62258-8.
6.2 Identity and source
6.2.1 General
The identity and source of supply for die devices shall be given with sufficient information for
the customer to communicate adequately with the supplier.
6.2.2 Type number
The type number or reference name given by the manufacturer and/or supplier to identify the
die device as supplied to the customer shall be given. In addition, the type number of an
equivalent packaged part using the same die should also be given.
6.2.3 Manufacturer
The identity of the firm responsible for manufacture of the die or wafer shall be given.
6.2.4 Supplier
The identity of the supplier of the die when this is different from the die manufacturer shall be
stated.
6.2.5 Signature
Where information on the identity of the device is embedded electronically or optically, this
should be
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