IEC TR 63072-1:2017

Photonic integrated circuits - Part 1: Introduction and roadmap for standardization

IEC TR 63072-1:2017(E) which is a Technical Report, provides an introduction to photonic integrated circuits (PICs) and describes a roadmap for the standardization of PIC technology over the next decade.

General Information

• Status: Published
• Publication Date: 10-May-2017
• ICS: 01 - GENERALITIES. TERMINOLOGY. STANDARDIZATION. DOCUMENTATION
• ICS: 33.180.99 - Other fibre optic equipment
• Technical Committee: SC 86C - Fibre optic systems and active devices
• Current Stage: PPUB - Publication issued
• Start Date: 09-May-2017
• Completion Date: 11-May-2017

Standards Content (Sample)

IEC TR 63072-1 ®
Edition 1.0 2017-05
TECHNICAL
REPORT
colour
inside
Photonic integrated circuits –
Part 1: Introduction and roadmap for standardization

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IEC TR 63072-1 ®
Edition 1.0 2017-05
TECHNICAL
REPORT
colour
inside
Photonic integrated circuits –

Part 1: Introduction and roadmap for standardization

INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
ICS 33.180.99 ISBN 978-2-8322-4279-7

– 2 – IEC TR 63072-1:2017  IEC 2017
CONTENTS
FOREWORD . 5
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
4 Photonic integrated circuit (PIC) . 9
4.1 Overview. 9
4.2 PIC families . 11
4.2.1 General . 11
4.2.2 Silicon photonics . 12
4.2.3 III-V photonics . 12
4.2.4 Silica and silicon nitride PICs. 12
4.3 Manufacturing capabilities. 13
4.4 Global market . 13
4.5 Global government investment in PIC research and development . 13
4.5.1 General . 13
4.5.2 United States of America . 13
4.5.3 Europe. 13
4.5.4 Japan . 13
5 Silicon photonics . 14
5.1 Overview. 14
5.2 Integration schemes . 14
5.2.1 General . 14
5.2.2 Heterogeneous integration . 15
5.2.3 Homogenous integration . 15
5.3 Non-linear behaviour . 15
6 III-V photonics . 15
6.1 Indium phosphide (InP) photonics . 15
7 PIC transceiver – A simple example . 17
7.1 Overview. 17
7.2 Transmitter section . 17
7.3 Receiver section . 18
8 Optical sources . 19
8.1 Overview. 19
8.2 Advances in III-V integration onto silicon PICs . 19
8.3 Vertical cavity surface emitting lasers (VCSELs) . 20
9 Optical receivers. 20
10 Modulators . 21
10.1 Overview. 21
10.2 Common modulator structures . 21
10.3 Plasma dispersion effect . 22
10.4 Plasmonics . 23
10.5 Silicon organic hybrid . 23
11 Switches . 24
11.1 Overview. 24
11.2 Mach-Zehnder interferometers (MZI) . 24
11.3 Micro-ring resonator (MRR) . 24

11.4 Double-ring assisted MZI (DR-MZI) . 25
12 3D integration . 25
12.1 Optochip . 25
12.2 Through-silicon-vias (TSVs) . 25
12.3 Hybrid integration process example . 26
12.4 Flip-chip bonding . 26
12.5 State of the art in 3D research and development . 27
13 Commercial state of the art . 27
13.1 Overview. 27
13.2 Luxtera . 27
13.3 Intel . 28
13.4 Mellanox . 28
13.5 Oracle . 29
13.6 IBM . 29
13.7 Photonics Electronics Technology Research Association (PETRA) . 29
14 PIC coupling interfaces . 30
14.1 Overview. 30
14.2 Grating coupler . 30
14.3 Adiabatic coupling . 33
14.4 Butt coupling . 35
14.5 Orthogonal chip-to-fibre coupling . 35
15 Electrical interface . 36
16 Packaging . 37
17 Standardization roadmap . 37
Bibliography . 39

Figure 1 – Examples of PICs [1] . 11
Figure 2 – Optical beam forming network fabricated in TriPleX (silicon nitride). 12
Figure 3 – Typical silicon waveguides [6] . 14
Figure 4 – Heterogeneous integration by flip chip and copper pillars . 15
Figure 5 – Indium phosphide PIC with many structures, including AWG . 16
Figure 6 – Combined InP and TriPleX microwave photonic beam-forming network . 17
Figure 7 – Schematic of four channel PIC transceiver by Luxtera [6] . 18
Figure 8 – Schematic view of 3D assembly of PIC + EIC electro-optical assembly [6] . 20
Figure 9 – Example of Ge-on-Si photodetector formed by germanium selective epitaxy [6] . 21
Figure 10 – High speed PN modulator [6] . 22
Figure 11 – PETRA optical I/O core chip modulation scheme . 23
Figure 12 – Silicon organic hybrid . 24
Figure 13 – 4 x 4 switching matrix PIC attached to PCB with wire bonds on the EU
FP7 PhoxTroT project . 25
Figure 14 – EU FP7 project PhoxTroT 3D integrated optochip concept . 26
Figure 15 – LIFT principle . 27
Figure 16 – PETRA optical I/O core performance at 25 Gb/s . 29
Figure 17 – Examples of vertical grating couplers [6] . 31
Figure 18 – Coupling efficiency of single polarization grating coupler (SPGC) at 1 310
nm and 1 490 nm [91] . 32

– 4 – IEC TR 63072-1:2017  IEC 2017
Figure 19 – C
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