SIST EN 16602-70-12:2016

Space product assurance - Design rules for printed circuit boards

This standard specifies the requirements for the supplier and PCB manufacturer for PCB design.
This standard is applicable for all types of PCBs, including sequential, rigid and flexible PCBs, HDI and RF PCBs.
This standard can be made applicable for other products combining mechanical and electrical functionality using additive or reductive manufacturing processes, as used in PCB manufacturing. Examples of such products are slip rings and bus bars.
This standard may be tailored for the specific characteristics and constraints of a space project in conformance with ECSS-S-ST-00.

Raumfahrtproduktsicherung - Designregeln für Leiterplatten

Assurance produit des projets spatiaux - Règles de conception des circuits imprimés

Zagotavljanje varnih proizvodov v vesoljski tehniki - Pravila načtovanja za plošče tiskanih vezij

Ta standard določa zahteve, ki veljajo za dobavitelja in proizvajalca plošč tiskanih vezij za načrtovanje plošč tiskanih vezij. Ta standard se uporablja za vse vrste plošč tiskanih vezij, vključno z zaporednimi, togimi in gibljivimi ploščami tiskanih vezij ter ploščami tiskanih vezij HDI in RF. Ta standard se lahko uporablja za druge izdelke, ki, z uporabo aditivnih ali reduktivnih proizvodnih postopkov, ki se uporabljajo pri proizvodnji plošč tiskanih vezij, združujejo mehanske in električne funkcije. Primeri takih izdelkov so drsni obroči in zbiralke. Ta standard se lahko prilagodi posameznim lastnostim in omejitvam vesoljskega projekta v skladu s standardom ECSS-S-ST-00.

General Information

• Status: Published
• Public Enquiry End Date: 29-Mar-2016
• Publication Date: 16-Oct-2016
• ICS: 31.180 - Printed circuits and boards
• ICS: 49.140 - Space systems and operations
• Technical Committee: I13 - Imaginarni 13
• Current Stage: 6060 - National Implementation/Publication (Adopted Project)
• Start Date: 14-Oct-2016
• Due Date: 19-Dec-2016
• Completion Date: 17-Oct-2016
• Mandate: M/496 - Mandate addressed to CEN, CENELEC and ETSI to develop standardisation regarding space industry (Phase 3 of the process)
• Ref Project: EN 16602-70-12:2016 - Space product assurance - Design rules for printed circuit boards

Standards Content (Sample)

SLOVENSKI STANDARD
SIST EN 16602-70-12:2016
01-december-2016
=DJRWDYOMDQMHYDUQLKSURL]YRGRYYYHVROMVNLWHKQLNL3UDYLODQDþWRYDQMD]DSORãþH
WLVNDQLKYH]LM
Space product assurance - Design rules for printed circuit boards
Raumfahrtproduktsicherung - Designregeln für Leiterplatten
Assurance produit des projets spatiaux - Règles de conception des circuits imprimés
Ta slovenski standard je istoveten z: EN 16602-70-12:2016
ICS:
31.180 7LVNDQDYH]MD7,9LQWLVNDQH Printed circuits and boards
SORãþH
49.140 Vesoljski sistemi in operacije Space systems and
operations
SIST EN 16602-70-12:2016 en,fr,de
2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

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SIST EN 16602-70-12:2016

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SIST EN 16602-70-12:2016


EUROPEAN STANDARD
EN 16602-70-12

NORME EUROPÉENNE

EUROPÄISCHE NORM
October 2016
ICS 31.180; 49.140

English version

Space product assurance - Design rules for printed circuit
boards
Assurance produit des projets spatiaux - Règles de Raumfahrtproduktsicherung - Designregeln für
conception des circuits imprimés Leiterplatten
This European Standard was approved by CEN on 22 May 2016.

CEN and CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for
giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical
references concerning such national standards may be obtained on application to the CEN-CENELEC Management Centre or to
any CEN and CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other language made by
translation under the responsibility of a CEN and CENELEC member into its own language and notified to the CEN-CENELEC
Management Centre has the same status as the official versions.

CEN and CENELEC members are the national standards bodies and national electrotechnical committees of Austria, Belgium,
Bulgaria, Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany,
Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Netherlands, Norway, Poland, Portugal, Romania,
Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and United Kingdom.






















CEN-CENELEC Management Centre:
Avenue Marnix 17, B-1000 Brussels
© 2016 CEN/CENELEC All rights of exploitation in any form and by any means Ref. No. EN 16602-70-12:2016 E
reserved worldwide for CEN national Members and for
CENELEC Members.

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SIST EN 16602-70-12:2016
EN 16602-70-12:2016 (E)
Table of contents
European foreword . 12
Introduction . 13
1 Scope . 14
2 Normative references . 15
3 Terms, definitions and abbreviated terms . 16
3.1 Terms from other standards . 16
3.2 Terms specific to the present standard . 16
3.3 Abbreviated terms. 24
4 Principles . 26
4.1 Qualified PCBs . 26
4.2 Manufacturing tolerances. 26
4.3 Reliability of design . 26
5 Design review and MRR . 28
5.1 Overview . 28
5.2 Documentation . 28
6 General design and production requirements . 30
6.1 Reliability of design . 30
6.2 Choice of materials and build-up . 30
6.2.1 Overview . 30
6.2.2 Material selection . 33
6.3 Selection of the PCB manufacturer . 33
6.4 Traceability and marking . 33
7 Rigid PCBs . 34
7.1 PCB build-up . 34
7.1.1 General . 34
7.1.2 Copper styles . 34
7.1.3 Dielectric thickness . 36
7.2 PCB dimension . 39
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EN 16602-70-12:2016 (E)
7.3 Thickness of PCB . 39
7.3.1 General . 39
7.3.2 Polyimide PCB . 40
7.3.3 Epoxy PCB . 40
7.3.4 Number of copper layers in PCB . 40
7.3.5 Aspect ratio of vias . 40
7.4 Track width and spacing . 41
7.4.1 General . 41
7.4.2 Manufacturing tolerances for width and spacing . 41
7.4.3 External layers . 42
7.4.4 Normal pitch tracks on internal layers. 43
7.4.5 Fine pitch tracks on internal layers . 44
7.4.6 Routing to AAD footprint on internal layers . 45
7.5 Pad design . 46
7.5.1 Non-functional pad removal . 46
7.5.2 Pad dimensions . 46
7.5.3 Non-circular external pads . 48
7.6 Copper planes in rigid PCB . 49
7.7 Design considerations for the prevention of sliver and peelable . 50
7.8 PCB surface finish . 50
7.8.1 Metallization . 50
7.8.2 Solder mask . 51
8 Flex PCBs . 52
8.1 Overview . 52
8.2 Dynamic applications . 52
8.3 PCB build-up . 52
8.3.1 General . 52
8.3.2 Dielectric materials . 52
8.3.3 Copper cladding . 53
8.3.4 Copper planes in flex PCB . 53
8.4 Track design . 54
8.5 Through holes . 55
8.5.1 Annular ring. 55
8.5.2 Vias and pads . 56
8.5.3 Tear drop pad for flex PCB . 56
8.6 Bending radius . 57
8.6.1 Overview . 57
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EN 16602-70-12:2016 (E)
8.6.2 General . 57
8.7 Sculptured flex PCB . 58
8.7.1 Overview . 58
8.7.2 General . 58
8.7.3 Copper foil dimensions for build-up . 58
8.7.4 Connection finger . 59
8.7.5 Through-holes . 60
8.7.6 Bending radius . 61
9 Rigid-flex PCBs . 62
9.1 Overview . 62
9.2 General . 62
9.3 Build-up . 63
9.4 Cover layer . 64
9.5 Interface of rigid part and flexible part . 64
9.6 Pads . 64
10 Thermal rules and heat sinks . 65
10.1 Overview . 65
10.2 General requirements . 65
10.3 Specific requirements for external heat sink. 65
10.3.1 Overview . 65
10.3.2 Construction of the interface between PCB and heat sink . 65
10.3.3 Dimensional requirements . 66
10.4 Specific requirements for internal heat sink . 68
10.4.1 General . 68
10.4.2 Cu thickness and type . 68
10.4.3 CIC and Molybdenum inserts . 69
10.4.4 Dimensional requirements . 69
11 HDI PCBs . 71
11.1 Overview . 71
11.2 Justification . 71
11.3 Microvia technology . 71
11.4 Microvias . 72
11.4.1 Build-up of microvia layers . 72
11.4.2 Design of microvias . 74
11.4.3 Pad design for microvia . 74
11.4.4 Annular ring for microvias. 75
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EN 16602-70-12:2016 (E)
11.5 Core PCB for HDI . 75
11.5.1 General build-up . 75
11.5.2 Annular ring on vias for fine pitch footprint . 76
11.5.3 Track width and spacing on external layers . 77
11.5.4 Track width and spacing on internal layers for impedance control and
routing to AAD . 77
11.5.5 Track width and spacing on internal layers for differential pair routing
within the footprint of 1,0 mm pitch AAD . 78
11.5.6 Aspect ratio of vias for footprint of AAD with 1 mm pitch . 79
12 PCBs for high frequency applications . 81
12.1 Material selection . 81
12.2 Build-up of RF PCB . 81
12.3 Embedded film resistors . 81
12.4 Thickness of RF PCB . 83
12.5 Track width and spacing . 83
12.5.1 External layers . 83
12.5.2 Internal Layers . 84
12.6 Pad design . 84
12.6.1 Pad dimensions . 84
12.6.2 Non-functional pads . 84
12.7 Surface finish . 84
12.8 Profiled layers and vias . 84
13 Electrical requirements for PCB design . 86
13.1 Overview . 86
13.2 General . 87
13.3 PCB drying . 87
13.4 Electrical characteristics . 87
13.5 Floating metal . 88
13.6 Current rating . 88
13.6.1 Overview . 88
13.6.2 Requirements for temperature increment . 89
13.6.3 Requirements for the model IPC-2152 for current rating . 89
13.6.4 Amendments to the model from IPC-2152 . 90
13.7 Provisions to prevent open circuit failure on critical tracks . 91
13.7.1 Overview . 91
13.7.2 Routing . 92
13.8 Voltage rating . 92
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EN 16602-70-12:2016 (E)
13.8.1 Overview . 92
13.8.2 General requirements . 92
13.8.3 Spacing on flex and rigid-flex laminate . 94
13.8.4 Conformal coating . 95
13.9 Double insulation design rules for critical tracks . 96
13.9.1 Overview . 96
13.9.2 Critical nets . 96
13.9.3 Prevention of short circuit . 96
13.10 Insulation distance of combined requirements on rigid PCB . 101
13.11 Controlled impedance tracks . 106
13.11.1 Definitions specific to controlled impedance . 106
13.11.2 General rules . 106
13.11.3 Microstrip and stripline . 106
13.11.4 Line impedance termination for end-to-end configuration . 107
13.11.5 Line impedance termination for multidrop configuration . 107
13.12 Digital PCB . 108
13.12.1 Overview . 108
13.12.2 Zone management and routing . 108
13.12.3 Criticality of digital signals . 109
13.13 Analog PCB . 110
13.13.1 Overview . 110
13.13.2 Criticality of analog signals . 110
13.13.3 Routing and shielding . 111
13.14 Mixed analog-digital PCB . 112
14 Design for assembly. 113
14.1 Overview . 113
14.2 General . 113
14.3 Placement requirements . 114
14.3.1 Conductive patterns . 114
14.3.2 Components. 115
14.3.3 Component pads . 117
14.3.4 Fan out of SMT pads . 118
14.3.5 Fan out of PTH . 120
14.4 Specific requirements for fused tin-lead finish . 121
14.5 Dimensional requirements for SMT foot print . 121
14.5.1 Overview . 121
14.5.2 General . 122
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14.5.3 Bipolar components . 123
14.5.4 SOIC components . 124
14.5.5 J-leaded components . 125
14.5.6 LCC components . 126
14.5.7 Flat pack components . 128
14.5.8 AAD components . 129
15 Design of test coupon . 130
15.1 Design rules for test coupon . 130
15.2 Test coupon design . 130
Annex A (normative) PCB definition dossier - DRD . 133
A.1 DRD identification . 133
A.1.1 Requirement identification and source document . 133
A.1.2 Purpose and objective . 133
A.2 Expected response . 133
A.2.1 Scope and content . 133
A.2.2 Special remarks . 139
A.2.3 Example figures . 139
Annex B (normative) PCB manufacturing dossier – DRD . 144
B.1 DRD identification . 144
B.1.1 Requirement identification and source document . 144
B.1.2 Purpose and objective . 144
B.2 Expected response . 144
B.2.1 Scope and content . 144
B.2.2 Special remarks . 145
Annex C (informative) Example of capability list of PID . 146
Annex D (informative) Track current rating computation methodology . 148
D.1 Introduction of the three models. 148
D.1.1 Overview . 148
D.1.2 Formulae for the three models . 149
D.1.3 Example of current rating . 150
D.2 Track current rating computation based on IPC-2152 . 150
D.3 Track current rating computation based on CNES/QFT/IN.0113 . 154
D.4 Track current rating computation based on IPC-2221A . 158
Annex E (informative) Example of calculation of PTH pad dimensions . 162
Annex F (informative) Prevention of resin starvation and cracks . 164
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EN 16602-70-12:2016 (E)
F.1 Prevention of resin cracks. . 164
F.2 Prevention of resin starvation . 164
Annex G (informative) Example of MRR checklist . 166
Bibliography . 170

Figures
Figure 3-1: Simplified build-up of HDI PCB . 20
Figure 3-2: Projected peak-to-peak insulation distance . 23
Figure 7-1: Example of automated fine pitch routing and possible improvements . 45
Figure 7-2: Comparison between circular and oblong pads showing annular ring and
the centre of the hole misregistered with the centre of the pad . 48
Figure 7-3: Grid copper plane with openings . 49
Figure 7-4: Example of peelable (left) and sliver (right). 50
Figure 8-1: Clearance of tracks on flex PCBs. . 54
Figure 8-2: Tracks on flex, defining termination and bending zones. . 55
Figure 8-3: Teardrop reinforcement of terminal pads in flex PCB. . 56
Figure 8-4: Bending radius of assembled flex . 57
Figure 8-5: Sculptured flex circuit . 58
Figure 8-6: Build-up of sculptured flex circuit . 59
Figure 8-7: Connection finger of sculptured flex circuit .
...